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| author | Clifford Wolf <clifford@clifford.at> | 2017-10-31 18:24:01 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2017-10-31 18:24:01 +0100 |
| commit | 3ba18d001754de563ab0baa2a1c8eecbe63ef121 (patch) | |
| tree | 55369de2e9c3b4d7651961b9308b2c8893583ae1 /icefuzz/tests/sb_io_od.v | |
| parent | d9d2a3dcaa749014f5b9a539768b8368bb529b28 (diff) | |
| parent | 2ad5600b47f436752418609af19915a00e7b24f8 (diff) | |
Merge branch 'daveshah1-u5k'
Diffstat (limited to 'icefuzz/tests/sb_io_od.v')
| -rw-r--r-- | icefuzz/tests/sb_io_od.v | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/icefuzz/tests/sb_io_od.v b/icefuzz/tests/sb_io_od.v new file mode 100644 index 0000000..7894741 --- /dev/null +++ b/icefuzz/tests/sb_io_od.v @@ -0,0 +1,62 @@ +//`define CONN_INTERNAL_BITS + +`define PINTYPE 6'b010001 +// `define IOSTANDARD "SB_LVCMOS" +`define IOSTANDARD "SB_LVCMOS" + +// The following IO standards are just aliases for SB_LVCMOS +// `define IOSTANDARD "SB_LVCMOS25_16" +// `define IOSTANDARD "SB_LVCMOS25_12" +// `define IOSTANDARD "SB_LVCMOS25_8" +// `define IOSTANDARD "SB_LVCMOS25_4" +// `define IOSTANDARD "SB_LVCMOS18_10" +// `define IOSTANDARD "SB_LVCMOS18_8" +// `define IOSTANDARD "SB_LVCMOS18_4" +// `define IOSTANDARD "SB_LVCMOS18_2" +// `define IOSTANDARD "SB_LVCMOS15_4" +// `define IOSTANDARD "SB_LVCMOS15_2" +// `define IOSTANDARD "SB_MDDR10" +// `define IOSTANDARD "SB_MDDR8" +// `define IOSTANDARD "SB_MDDR4" +// `define IOSTANDARD "SB_MDDR2" + +`ifdef CONN_INTERNAL_BITS +module top ( + inout pin, + input latch_in, + input clk_in, + input clk_out, + input oen, + input dout_0, + input dout_1, + output din_0, + output din_1 +); +`else +module top(pin); + inout pin; + wire latch_in = 0; + wire clk_in = 0; + wire clk_out = 0; + wire oen = 0; + wire dout_0 = 0; + wire dout_1 = 0; + wire din_0; + wire din_1; +`endif + SB_IO_OD #( + .PIN_TYPE(`PINTYPE), + .NEG_TRIGGER(1'b0) + ) IO_PIN_I ( + .PACKAGEPIN(pin), + .LATCHINPUTVALUE(latch_in), + .CLOCKENABLE(clk_en), + .INPUTCLK(clk_in), + .OUTPUTCLK(clk_out), + .OUTPUTENABLE(oen), + .DOUT0(dout_0), + .DOUT1(dout_1), + .DIN0(din_0), + .DIN1(din_1) + ); +endmodule |
