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-rw-r--r--docs/source/ultraplus.rst248
1 files changed, 104 insertions, 144 deletions
diff --git a/docs/source/ultraplus.rst b/docs/source/ultraplus.rst
index 7a0640d..a09aaeb 100644
--- a/docs/source/ultraplus.rst
+++ b/docs/source/ultraplus.rst
@@ -32,98 +32,64 @@ of signals and configuration bits is documented below.
| **Signal Assignments**
-+----------+----------+----------+----------+----------+----------+
-| SB_MAC16 | DSP0 | DSP1 | DSP2 | DSP3 | IPCON4 |
-| port | | | | | |
-+==========+==========+==========+==========+==========+==========+
-| CLK | -- | -- | lutff_gl | -- | -- |
-| | | | obal/clk | | |
-+----------+----------+----------+----------+----------+----------+
-| CE | -- | -- | lutff_gl | -- | -- |
-| | | | obal/cen | | |
-+----------+----------+----------+----------+----------+----------+
-| C[7:0] | -- | -- | -- | l | -- |
-| | | | | utff\_[7 | |
-| | | | | :0]/in_3 | |
-+----------+----------+----------+----------+----------+----------+
-| C[15:8] | -- | -- | -- | l | -- |
-| | | | | utff\_[7 | |
-| | | | | :0]/in_1 | |
-+----------+----------+----------+----------+----------+----------+
-| A[7:0] | -- | -- | l | -- | -- |
-| | | | utff\_[7 | | |
-| | | | :0]/in_3 | | |
-+----------+----------+----------+----------+----------+----------+
-| A[15:8] | -- | -- | l | -- | -- |
-| | | | utff\_[7 | | |
-| | | | :0]/in_1 | | |
-+----------+----------+----------+----------+----------+----------+
-| B[7:0] | -- | l | -- | -- | -- |
-| | | utff\_[7 | | | |
-| | | :0]/in_3 | | | |
-+----------+----------+----------+----------+----------+----------+
-| B[15:8] | -- | l | -- | -- | -- |
-| | | utff\_[7 | | | |
-| | | :0]/in_1 | | | |
-+----------+----------+----------+----------+----------+----------+
-| D[7:0] | l | -- | -- | -- | -- |
-| | utff\_[7 | | | | |
-| | :0]/in_3 | | | | |
-+----------+----------+----------+----------+----------+----------+
-| D[15:8] | l | -- | -- | -- | -- |
-| | utff\_[7 | | | | |
-| | :0]/in_1 | | | | |
-+----------+----------+----------+----------+----------+----------+
-| IRSTTOP | -- | lutff_gl | -- | -- | -- |
-| | | obal/s_r | | | |
-+----------+----------+----------+----------+----------+----------+
-| IRSTBOT | lutff_gl | -- | -- | -- | -- |
-| | obal/s_r | | | | |
-+----------+----------+----------+----------+----------+----------+
-| ORSTTOP | -- | -- | -- | lutff_gl | -- |
-| | | | | obal/s_r | |
-+----------+----------+----------+----------+----------+----------+
-| ORSTBOT | -- | -- | lutff_gl | -- | -- |
-| | | | obal/s_r | | |
-+----------+----------+----------+----------+----------+----------+
-| AHOLD | -- | -- | lutf | -- | -- |
-| | | | f_0/in_0 | | |
-+----------+----------+----------+----------+----------+----------+
-| BHOLD | -- | lutf | -- | -- | -- |
-| | | f_0/in_0 | | | |
-+----------+----------+----------+----------+----------+----------+
-| CHOLD | -- | -- | -- | lutf | -- |
-| | | | | f_0/in_0 | |
-+----------+----------+----------+----------+----------+----------+
-| DHOLD | lutf | -- | -- | -- | -- |
-| | f_0/in_0 | | | | |
-+----------+----------+----------+----------+----------+----------+
-| OHOLDTOP | -- | -- | -- | lutf | -- |
-| | | | | f_1/in_0 | |
-+----------+----------+----------+----------+----------+----------+
-| OHOLDBOT | lutf | -- | -- | -- | -- |
-| | f_1/in_0 | | | | |
-+----------+----------+----------+----------+----------+----------+
-| A | -- | -- | -- | lutf | -- |
-| DDSUBTOP | | | | f_3/in_0 | |
-+----------+----------+----------+----------+----------+----------+
-| A | lutf | -- | -- | -- | -- |
-| DDSUBBOT | f_3/in_0 | | | | |
-+----------+----------+----------+----------+----------+----------+
-| OLOADTOP | -- | -- | -- | lutf | -- |
-| | | | | f_2/in_0 | |
-+----------+----------+----------+----------+----------+----------+
-| OLOADBOT | lutf | -- | -- | -- | -- |
-| | f_2/in_0 | | | | |
-+----------+----------+----------+----------+----------+----------+
-| CI | lutf | -- | -- | -- | -- |
-| | f_4/in_0 | | | | |
-+----------+----------+----------+----------+----------+----------+
-| O[31:0] | mult/ | mult/O | mult/O\ | mult/O\ | -- |
-| | O\_[7:0] | \_[15:8] | _[23:16] | _[31:24] | |
-+----------+----------+----------+----------+----------+----------+
-| CO | -- | -- | -- | -- | slf_op_0 |
-+----------+----------+----------+----------+----------+----------+
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| SB_MAC16 | DSP0 | DSP1 | DSP2 | DSP3 | IPCON4 |
+| port | | | | | |
++==========+=====================+=====================+=====================+=====================+=====================+
+| CLK | -- | -- | lutff_global/clk | -- | -- |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| CE | -- | -- | lutff_global/cen | -- | -- |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| C[7:0] | -- | -- | -- | lutff\_[7:0]/in_3 | -- |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| C[15:8] | -- | -- | -- | lutff\_[7:0]/in_1 | -- |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| A[7:0] | -- | -- | lutff\_[7:0]/in_3 | -- | -- |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| A[15:8] | -- | -- | lutff\_[7:0]/in_1 | -- | -- |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| B[7:0] | -- | lutff\_[7:0]/in_3 | | | |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| B[15:8] | -- | lutff\_[7:0]/in_1 | | | |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| D[7:0] | lutff\_[7:0]/in_3 | | | | |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| D[15:8] | lutff\_[7:0]/in_1 | | | | |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| IRSTTOP | -- | lutff_global/s_r | | | |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| IRSTBOT | lutff_global/s_r | | | | |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| ORSTTOP | -- | -- | -- | lutff_global/s_r | |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| ORSTBOT | -- | -- | lutff_global/s_r | | |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| AHOLD | -- | -- | lutff_0/in_0 | | |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| BHOLD | -- | lutff_0/in_0 | | | |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| CHOLD | -- | -- | -- | lutff_0/in_0 | |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| DHOLD | lutff_0/in_0 | | | | |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| OHOLDTOP | -- | -- | -- | lutff_1/in_0 | |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| OHOLDBOT | lutff_1/in_0 | | | | |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| A | -- | -- | -- | lutff_3/in_0 | |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| A | lutff_3/in_0 | | | | |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| OLOADTOP | -- | -- | -- | lutff_2/in_0 | |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| OLOADBOT | lutff_2/in_0 | | | | |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| CI | lutff_4/in_0 | | | | |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| O[31:0] | mult/O\_[7:0] | mult/O\_[15:8] | mult/O\_[23:16] | mult/O\_[31:24] | -- |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
+| CO | -- | -- | -- | -- | slf_op_0 |
++----------+---------------------+---------------------+---------------------+---------------------+---------------------+
| **Configuration Bits**
@@ -141,58 +107,52 @@ bits are then located in IPConnect tile (0, 19) CBIT[6:3].
The full list of configuration bits, including the changes for the DSP
at (0, 15) are described in the table below.
-+-----------------------+-----------------------+-----------------------+
-| Parameter | Normal Position | DSP (0, 15) |
-| | | Changes |
-+=======================+=======================+=======================+
-| C_REG | DSP0.CBIT_0 | |
-+-----------------------+-----------------------+-----------------------+
-| A_REG | DSP0.CBIT_1 | |
-+-----------------------+-----------------------+-----------------------+
-| B_REG | DSP0.CBIT_2 | |
-+-----------------------+-----------------------+-----------------------+
-| D_REG | DSP0.CBIT_3 | |
-+-----------------------+-----------------------+-----------------------+
-| TOP_8x8_MULT_REG | DSP0.CBIT_4 | |
-+-----------------------+-----------------------+-----------------------+
-| BOT_8x8_MULT_REG | DSP0.CBIT_5 | |
-+-----------------------+-----------------------+-----------------------+
-| PIP | DSP0.CBIT_6 | |
-| ELINE_16x16_MULT_REG1 | | |
-+-----------------------+-----------------------+-----------------------+
-| PIP | DSP0.CBIT_7 | |
-| ELINE_16x16_MULT_REG2 | | |
-+-----------------------+-----------------------+-----------------------+
-| TOPOUTPUT_SELECT[0] | DSP1.CBIT_0 | |
-+-----------------------+-----------------------+-----------------------+
-| TOPOUTPUT_SELECT[1] | DSP1.CBIT_1 | (0, 19).CBIT_3 |
-+-----------------------+-----------------------+-----------------------+
-| TOPA | DSP1.CBIT\_[3:2] | (0, 19).CBIT\_[5:4] |
-| DDSUB_LOWERINPUT[1:0] | | |
-+-----------------------+-----------------------+-----------------------+
-| TOPADDSUB_UPPERINUT | DSP1.CBIT_4 | (0, 19).CBIT_6 |
-+-----------------------+-----------------------+-----------------------+
-| TOPAD | DSP1.CBIT\_[6:5] | |
-| DSUB_CARRYSELECT[1:0] | | |
-+-----------------------+-----------------------+-----------------------+
-| BOTOUTPUT_SELECT[0] | DSP1.CBIT_7 | |
-+-----------------------+-----------------------+-----------------------+
-| BOTOUTPUT_SELECT[1] | DSP2.CBIT_0 | |
-+-----------------------+-----------------------+-----------------------+
-| BOTA | DSP2.CBIT\_[2:1] | |
-| DDSUB_LOWERINPUT[1:0] | | |
-+-----------------------+-----------------------+-----------------------+
-| BOTADDSUB_UPPERINPUT | DSP2.CBIT_3 | |
-+-----------------------+-----------------------+-----------------------+
-| BOTAD | DSP2.CBIT\_[5:4] | |
-| DSUB_CARRYSELECT[1:0] | | |
-+-----------------------+-----------------------+-----------------------+
-| MODE_8x8 | DSP2.CBIT_6 | |
-+-----------------------+-----------------------+-----------------------+
-| A_SIGNED | DSP2.CBIT_7 | |
-+-----------------------+-----------------------+-----------------------+
-| B_SIGNED | DSP3.CBIT_0 | |
-+-----------------------+-----------------------+-----------------------+
++----------------------------+-----------------------+-----------------------+
+| Parameter | Normal Position | DSP (0, 15) |
+| | | Changes |
++============================+=======================+=======================+
+| C_REG | DSP0.CBIT_0 | |
++----------------------------+-----------------------+-----------------------+
+| A_REG | DSP0.CBIT_1 | |
++----------------------------+-----------------------+-----------------------+
+| B_REG | DSP0.CBIT_2 | |
++----------------------------+-----------------------+-----------------------+
+| D_REG | DSP0.CBIT_3 | |
++----------------------------+-----------------------+-----------------------+
+| TOP_8x8_MULT_REG | DSP0.CBIT_4 | |
++----------------------------+-----------------------+-----------------------+
+| BOT_8x8_MULT_REG | DSP0.CBIT_5 | |
++----------------------------+-----------------------+-----------------------+
+| PIPELINE_16x16_MULT_REG1 | DSP0.CBIT_6 | |
++----------------------------+-----------------------+-----------------------+
+| PIPELINE_16x16_MULT_REG2 | DSP0.CBIT_7 | |
++----------------------------+-----------------------+-----------------------+
+| TOPOUTPUT_SELECT[0] | DSP1.CBIT_0 | |
++----------------------------+-----------------------+-----------------------+
+| TOPOUTPUT_SELECT[1] | DSP1.CBIT_1 | (0, 19).CBIT_3 |
++----------------------------+-----------------------+-----------------------+
+| TOPADDSUB_LOWERINPUT[1:0] | DSP1.CBIT\_[3:2] | (0, 19).CBIT\_[5:4] |
++----------------------------+-----------------------+-----------------------+
+| TOPADDSUB_UPPERINUT | DSP1.CBIT_4 | (0, 19).CBIT_6 |
++----------------------------+-----------------------+-----------------------+
+| TOPADDSUB_CARRYSELECT[1:0] | DSP1.CBIT\_[6:5] | |
++----------------------------+-----------------------+-----------------------+
+| BOTOUTPUT_SELECT[0] | DSP1.CBIT_7 | |
++----------------------------+-----------------------+-----------------------+
+| BOTOUTPUT_SELECT[1] | DSP2.CBIT_0 | |
++----------------------------+-----------------------+-----------------------+
+| BOTADDSUB_LOWERINPUT[1:0] | DSP2.CBIT\_[2:1] | |
++----------------------------+-----------------------+-----------------------+
+| BOTADDSUB_UPPERINPUT | DSP2.CBIT_3 | |
++----------------------------+-----------------------+-----------------------+
+| BOTADDSUB_CARRYSELECT[1:0] | DSP2.CBIT\_[5:4] | |
++----------------------------+-----------------------+-----------------------+
+| MODE_8x8 | DSP2.CBIT_6 | |
++----------------------------+-----------------------+-----------------------+
+| A_SIGNED | DSP2.CBIT_7 | |
++----------------------------+-----------------------+-----------------------+
+| B_SIGNED | DSP3.CBIT_0 | |
++----------------------------+-----------------------+-----------------------+
Lattice document a limited number of supported configurations in the ICE
Technology Library document, and Lattice's EDIF parser will reject
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-27 04:23:16 +0000