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AgeCommit message (Expand)Author
2019-02-22u4k: add SMCCLK cell locationSimon Schubert
2019-02-22iCE40 Ultra = iCE5LP = u4k portSimon Schubert
2018-05-13Added missing ieren entries for lm4k.Andrew Wygle
2018-05-12[WIP] Add partial icebox support for lm4k.Andrew Wygle
2018-05-12Add LM4K to icefuzz Makefile and fuzzconfig.py.Andrew Wygle
2018-05-06Add LM family support to icecube.shAndrew Wygle
2018-01-30Tidy upDavid Shah
2018-01-29Updated 5k timing data, icetime regression fixDavid Shah
2018-01-28DSP related fixesDavid Shah
2018-01-22More DSP timing fuzzing, start adding new tiles to icetimeDavid Shah
2018-01-22Seperate different DSP configs in timing dataDavid Shah
2018-01-20Fix 5k timing dataDavid Shah
2018-01-16I³C IO reverse engineered and documentedDavid Shah
2018-01-16Remove seperate 5k RAM DB and share with 8k insteadDavid Shah
2018-01-16Figure out missing SPI config bits, and add to chipdbDavid Shah
2017-11-28Whitespace fixesDavid Shah
2017-11-28Add uncommitted changes and tidy up some filesDavid Shah
2017-11-24Preparations for 5k icetimeDavid Shah
2017-11-24Documented I2C/SPI/LEDDA_IPDavid Shah
2017-11-24All 5k IP tracedDavid Shah
2017-11-24Work on UltraPlus IP tracingDavid Shah
2017-11-23Begin I2C/SPI IP reverse engineeringDavid Shah
2017-11-20Fix whitespace and a couple of typosDavid Shah
2017-11-17Add missing 5k BRAM bitsDavid Shah
2017-11-17Add support for UltraPlus SPRAMDavid Shah
2017-11-175k RGB driver reverse engineeredDavid Shah
2017-11-17Fix 5k corner routing, and reverse engineer SPRAMDavid Shah
2017-11-17Figure out DSP config bits for all locsDavid Shah
2017-11-17Trace DSP routingDavid Shah
2017-11-17Create icefuzz scripts for DSP and 5kDavid Shah
2017-11-08Preparations for DSP and IpCon fuzzingDavid Shah
2017-11-05Add more 5k RAM bits to dbDavid Shah
2017-11-02Add 5k colbuf fuzzing scriptsDavid Shah
2017-10-30PLL configuration fuzzing scriptDavid Shah
2017-10-29Share glb_netwk data between 5k and 8k partsDavid Shah
2017-10-25Add ColBufCtrl bits to database for 5k partsDavid Shah
2017-10-23Add some verilog tests for analysing up5k featuresDavid Shah
2017-10-23Fix IeRen database for up5kDavid Shah
2017-10-21Add DSP and IPConnect tile support to icepack and glbcheckDavid Shah
2017-10-20Fix make_ram40 for UltraPlusDavid Shah
2017-10-20Fix case where make_prim allocates all global buffer pinsDavid Shah
2017-10-20Quick fix of pin 23 issue (pending further discussion)David Shah
2017-08-01Squelch trailing whitespaceLarry Doolittle
2017-07-31Fix some bugs in two of the icefuzz make_*.py scriptsClifford Wolf
2017-07-31Fix icecube.sh to work with lin and lin64 dirs, remove hardcoded ICECUBEDIR=Clifford Wolf
2017-07-31Remove extra IoCtrl cf_bit_ and extra_padeb_test_ lines from databaseClifford Wolf
2017-07-02Introduce device class into fuxx workign directories and have glbcheck handle...Scott Shawcroft
2017-06-23More work figuring out values in icebox.pyScott Shawcroft
2017-06-22Add icefuzz support for the UP5K and rework underlying device specification f...Scott Shawcroft
2017-06-20icefuzz support for ice40UP5k FPGAScott Shawcroft
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