| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-02-04 | icepll: changes according to cliffordwolf/icestorm#67: | Matthias |
| 2017-02-02 | icepll: added -m option to choose between saving Verilog header or module | Matthias |
| 2017-02-01 | icepll: added -f option to export configuration as Verilog module | Matthias |
| 2017-02-01 | icepll: added -q option to suppress output to stdout | Matthias |
| 2016-12-17 | Fixed icepll divf range | Clifford Wolf |
| 2016-05-15 | Added FILTER_RANGE support to icepll | Clifford Wolf |
| 2016-03-02 | Added Makefile support for "make STATIC=1" | Clifford Wolf |
| 2016-02-27 | fix a few spelling errors | Ruben Undheim |
| 2016-02-14 | Added/improved support for mxe-based win32 cross builds | Clifford Wolf |
| 2016-01-04 | Added "icepll" PLL parameters calculator | Clifford Wolf |
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index : icestorm | |
| Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered) |
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