icestorm - Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)

Age	Commit message (Expand)	Author
2019-12-31	Add iteration over list of frequencies for best solution	Mats Engstrom
2019-05-26	icepll: Add support for writing output data to stdout	Michael Buesch
2019-05-26	icepll: Avoid segmentation fault, if opening of output file fails	Michael Buesch
2019-05-25	icepll: In quiet mode don't print info about target file name	Michael Buesch
2018-03-31	Mount NODEFS if using emscripten and nodejs	Robert Ou
2018-03-10	Add -n <module_name> option	Tom Verbeure
2017-11-15	Fix up build system to work with emscripten	Robert Ou
2017-07-31	Merge branch 'master' into ice5k	Clifford Wolf
2017-07-16	makefile: Make install target work for Windows	Robert Ou
2017-07-04	Fix coding style in icepll.cc	Clifford Wolf
2017-06-24	Update PLL DIVF range to be [0,127]	C-Elegans
2017-03-13	Remove trailing comma in icepll module output.	Josh Headapohl
2017-02-12	Clean up Makefiles	Elvira Khabirova
2017-02-04	icepll: changes according to cliffordwolf/icestorm#67:	Matthias
2017-02-02	icepll: added -m option to choose between saving Verilog header or module	Matthias
2017-02-01	icepll: added -f option to export configuration as Verilog module	Matthias
2017-02-01	icepll: added -q option to suppress output to stdout	Matthias
2016-12-17	Fixed icepll divf range	Clifford Wolf
2016-05-15	Added FILTER_RANGE support to icepll	Clifford Wolf
2016-03-02	Added Makefile support for "make STATIC=1"	Clifford Wolf
2016-02-27	fix a few spelling errors	Ruben Undheim
2016-02-14	Added/improved support for mxe-based win32 cross builds	Clifford Wolf
2016-01-04	Added "icepll" PLL parameters calculator	Clifford Wolf