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Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)
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/
icefuzz
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tests
/
bitop.v
blob: b698cf9bc831a143ac9a680781bec4ee81550c50 (
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module
top
(
input
a
,
b
,
output
y
);
assign
y
=
a
&
b
;
endmodule