lut_cascade.pcf « tests « icefuzz - icestorm - Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)

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set_location dst_lut 6 8 2 # SB_LUT4 (LogicCell: dst_lut_LC_0)
set_location src_lut 6 8 1 # SB_LUT4 (LogicCell: src_lut_LC_1)