diff options
Diffstat (limited to 'chips/imxrt1170/src/rt.rs')
| -rw-r--r-- | chips/imxrt1170/src/rt.rs | 1003 |
1 files changed, 1003 insertions, 0 deletions
diff --git a/chips/imxrt1170/src/rt.rs b/chips/imxrt1170/src/rt.rs new file mode 100644 index 0000000..e0f0dd4 --- /dev/null +++ b/chips/imxrt1170/src/rt.rs @@ -0,0 +1,1003 @@ +#![allow(non_camel_case_types)] + +#[derive(Copy, Clone, Debug, PartialEq, Eq)] +pub enum Interrupt { + #[doc = "0 - DMA0_DMA16"] + DMA0_DMA16 = 0, + #[doc = "1 - DMA1_DMA17"] + DMA1_DMA17 = 1, + #[doc = "2 - DMA2_DMA18"] + DMA2_DMA18 = 2, + #[doc = "3 - DMA3_DMA19"] + DMA3_DMA19 = 3, + #[doc = "4 - DMA4_DMA20"] + DMA4_DMA20 = 4, + #[doc = "5 - DMA5_DMA21"] + DMA5_DMA21 = 5, + #[doc = "6 - DMA6_DMA22"] + DMA6_DMA22 = 6, + #[doc = "7 - DMA7_DMA23"] + DMA7_DMA23 = 7, + #[doc = "8 - DMA8_DMA24"] + DMA8_DMA24 = 8, + #[doc = "9 - DMA9_DMA25"] + DMA9_DMA25 = 9, + #[doc = "10 - DMA10_DMA26"] + DMA10_DMA26 = 10, + #[doc = "11 - DMA11_DMA27"] + DMA11_DMA27 = 11, + #[doc = "12 - DMA12_DMA28"] + DMA12_DMA28 = 12, + #[doc = "13 - DMA13_DMA29"] + DMA13_DMA29 = 13, + #[doc = "14 - DMA14_DMA30"] + DMA14_DMA30 = 14, + #[doc = "15 - DMA15_DMA31"] + DMA15_DMA31 = 15, + #[doc = "16 - DMA_ERROR"] + DMA_ERROR = 16, + #[doc = "17 - CTI_TRIGGER_OUT0"] + CTI_TRIGGER_OUT0 = 17, + #[doc = "18 - CTI_TRIGGER_OUT1"] + CTI_TRIGGER_OUT1 = 18, + #[doc = "19 - CORE"] + CORE = 19, + #[doc = "20 - LPUART1"] + LPUART1 = 20, + #[doc = "21 - LPUART2"] + LPUART2 = 21, + #[doc = "22 - LPUART3"] + LPUART3 = 22, + #[doc = "23 - LPUART4"] + LPUART4 = 23, + #[doc = "24 - LPUART5"] + LPUART5 = 24, + #[doc = "25 - LPUART6"] + LPUART6 = 25, + #[doc = "26 - LPUART7"] + LPUART7 = 26, + #[doc = "27 - LPUART8"] + LPUART8 = 27, + #[doc = "28 - LPUART9"] + LPUART9 = 28, + #[doc = "29 - LPUART10"] + LPUART10 = 29, + #[doc = "30 - LPUART11"] + LPUART11 = 30, + #[doc = "31 - LPUART12"] + LPUART12 = 31, + #[doc = "32 - LPI2C1"] + LPI2C1 = 32, + #[doc = "33 - LPI2C2"] + LPI2C2 = 33, + #[doc = "34 - LPI2C3"] + LPI2C3 = 34, + #[doc = "35 - LPI2C4"] + LPI2C4 = 35, + #[doc = "36 - LPI2C5"] + LPI2C5 = 36, + #[doc = "37 - LPI2C6"] + LPI2C6 = 37, + #[doc = "38 - LPSPI1"] + LPSPI1 = 38, + #[doc = "39 - LPSPI2"] + LPSPI2 = 39, + #[doc = "40 - LPSPI3"] + LPSPI3 = 40, + #[doc = "41 - LPSPI4"] + LPSPI4 = 41, + #[doc = "42 - LPSPI5"] + LPSPI5 = 42, + #[doc = "43 - LPSPI6"] + LPSPI6 = 43, + #[doc = "44 - CAN1"] + CAN1 = 44, + #[doc = "45 - CAN1_ERROR"] + CAN1_ERROR = 45, + #[doc = "46 - CAN2"] + CAN2 = 46, + #[doc = "47 - CAN2_ERROR"] + CAN2_ERROR = 47, + #[doc = "48 - CAN3"] + CAN3 = 48, + #[doc = "49 - CAN3_ERROR"] + CAN3_ERROR = 49, + #[doc = "50 - FLEXRAM"] + FLEXRAM = 50, + #[doc = "51 - KPP"] + KPP = 51, + #[doc = "53 - GPR_IRQ"] + GPR_IRQ = 53, + #[doc = "54 - ELCDIF"] + ELCDIF = 54, + #[doc = "55 - LCDIFV2"] + LCDIFV2 = 55, + #[doc = "56 - CSI"] + CSI = 56, + #[doc = "57 - PXP"] + PXP = 57, + #[doc = "58 - MIPI_CSI"] + MIPI_CSI = 58, + #[doc = "59 - MIPI_DSI"] + MIPI_DSI = 59, + #[doc = "61 - GPIO6_COMBINED_0_15"] + GPIO6_COMBINED_0_15 = 61, + #[doc = "62 - GPIO6_COMBINED_16_31"] + GPIO6_COMBINED_16_31 = 62, + #[doc = "63 - DAC"] + DAC = 63, + #[doc = "64 - KEY_MANAGER"] + KEY_MANAGER = 64, + #[doc = "65 - WDOG2"] + WDOG2 = 65, + #[doc = "66 - SNVS_HP_NON_TZ"] + SNVS_HP_NON_TZ = 66, + #[doc = "67 - SNVS_HP_TZ"] + SNVS_HP_TZ = 67, + #[doc = "68 - SNVS_PULSE_EVENT"] + SNVS_PULSE_EVENT = 68, + #[doc = "69 - CAAM_IRQ0"] + CAAM_IRQ0 = 69, + #[doc = "70 - CAAM_IRQ1"] + CAAM_IRQ1 = 70, + #[doc = "71 - CAAM_IRQ2"] + CAAM_IRQ2 = 71, + #[doc = "72 - CAAM_IRQ3"] + CAAM_IRQ3 = 72, + #[doc = "73 - CAAM_RECORVE_ERRPR"] + CAAM_RECORVE_ERRPR = 73, + #[doc = "74 - CAAM_RTIC"] + CAAM_RTIC = 74, + #[doc = "75 - CDOG"] + CDOG = 75, + #[doc = "76 - SAI1"] + SAI1 = 76, + #[doc = "77 - SAI2"] + SAI2 = 77, + #[doc = "78 - SAI3_RX"] + SAI3_RX = 78, + #[doc = "79 - SAI3_TX"] + SAI3_TX = 79, + #[doc = "80 - SAI4_RX"] + SAI4_RX = 80, + #[doc = "81 - SAI4_TX"] + SAI4_TX = 81, + #[doc = "82 - SPDIF"] + SPDIF = 82, + #[doc = "83 - TMPSNS_INT"] + TMPSNS_INT = 83, + #[doc = "84 - TMPSNS_LOW_HIGH"] + TMPSNS_LOW_HIGH = 84, + #[doc = "85 - TMPSNS_PANIC"] + TMPSNS_PANIC = 85, + #[doc = "86 - LPSR_LP8_BROWNOUT"] + LPSR_LP8_BROWNOUT = 86, + #[doc = "87 - LPSR_LP0_BROWNOUT"] + LPSR_LP0_BROWNOUT = 87, + #[doc = "88 - ADC1"] + ADC1 = 88, + #[doc = "89 - ADC2"] + ADC2 = 89, + #[doc = "90 - USBPHY1"] + USBPHY1 = 90, + #[doc = "91 - USBPHY2"] + USBPHY2 = 91, + #[doc = "92 - RDC"] + RDC = 92, + #[doc = "93 - GPIO13_COMBINED_0_31"] + GPIO13_COMBINED_0_31 = 93, + #[doc = "95 - DCIC1"] + DCIC1 = 95, + #[doc = "96 - DCIC2"] + DCIC2 = 96, + #[doc = "97 - ASRC"] + ASRC = 97, + #[doc = "98 - FLEXRAM_ECC"] + FLEXRAM_ECC = 98, + #[doc = "99 - CM7_GPIO2_3"] + CM7_GPIO2_3 = 99, + #[doc = "100 - GPIO1_COMBINED_0_15"] + GPIO1_COMBINED_0_15 = 100, + #[doc = "101 - GPIO1_COMBINED_16_31"] + GPIO1_COMBINED_16_31 = 101, + #[doc = "102 - GPIO2_COMBINED_0_15"] + GPIO2_COMBINED_0_15 = 102, + #[doc = "103 - GPIO2_COMBINED_16_31"] + GPIO2_COMBINED_16_31 = 103, + #[doc = "104 - GPIO3_COMBINED_0_15"] + GPIO3_COMBINED_0_15 = 104, + #[doc = "105 - GPIO3_COMBINED_16_31"] + GPIO3_COMBINED_16_31 = 105, + #[doc = "106 - GPIO4_COMBINED_0_15"] + GPIO4_COMBINED_0_15 = 106, + #[doc = "107 - GPIO4_COMBINED_16_31"] + GPIO4_COMBINED_16_31 = 107, + #[doc = "108 - GPIO5_COMBINED_0_15"] + GPIO5_COMBINED_0_15 = 108, + #[doc = "109 - GPIO5_COMBINED_16_31"] + GPIO5_COMBINED_16_31 = 109, + #[doc = "110 - FLEXIO1"] + FLEXIO1 = 110, + #[doc = "111 - FLEXIO2"] + FLEXIO2 = 111, + #[doc = "112 - WDOG1"] + WDOG1 = 112, + #[doc = "113 - RTWDOG3"] + RTWDOG3 = 113, + #[doc = "114 - EWM"] + EWM = 114, + #[doc = "115 - OCOTP_READ_FUSE_ERROR"] + OCOTP_READ_FUSE_ERROR = 115, + #[doc = "116 - OCOTP_READ_DONE_ERROR"] + OCOTP_READ_DONE_ERROR = 116, + #[doc = "117 - GPC"] + GPC = 117, + #[doc = "118 - MUA"] + MUA = 118, + #[doc = "119 - GPT1"] + GPT1 = 119, + #[doc = "120 - GPT2"] + GPT2 = 120, + #[doc = "121 - GPT3"] + GPT3 = 121, + #[doc = "122 - GPT4"] + GPT4 = 122, + #[doc = "123 - GPT5"] + GPT5 = 123, + #[doc = "124 - GPT6"] + GPT6 = 124, + #[doc = "125 - PWM1_0"] + PWM1_0 = 125, + #[doc = "126 - PWM1_1"] + PWM1_1 = 126, + #[doc = "127 - PWM1_2"] + PWM1_2 = 127, + #[doc = "128 - PWM1_3"] + PWM1_3 = 128, + #[doc = "129 - PWM1_FAULT"] + PWM1_FAULT = 129, + #[doc = "130 - FLEXSPI1"] + FLEXSPI1 = 130, + #[doc = "131 - FLEXSPI2"] + FLEXSPI2 = 131, + #[doc = "132 - SEMC"] + SEMC = 132, + #[doc = "133 - USDHC1"] + USDHC1 = 133, + #[doc = "134 - USDHC2"] + USDHC2 = 134, + #[doc = "135 - USB_OTG2"] + USB_OTG2 = 135, + #[doc = "136 - USB_OTG1"] + USB_OTG1 = 136, + #[doc = "137 - ENET"] + ENET = 137, + #[doc = "138 - ENET_1588_TIMER"] + ENET_1588_TIMER = 138, + #[doc = "139 - ENET_1G_MAC0_TX_RX_1"] + ENET_1G_MAC0_TX_RX_1 = 139, + #[doc = "140 - ENET_1G_MAC0_TX_RX_2"] + ENET_1G_MAC0_TX_RX_2 = 140, + #[doc = "141 - ENET_1G"] + ENET_1G = 141, + #[doc = "142 - ENET_1G_1588_TIMER"] + ENET_1G_1588_TIMER = 142, + #[doc = "143 - XBAR1_IRQ_0_1"] + XBAR1_IRQ_0_1 = 143, + #[doc = "144 - XBAR1_IRQ_2_3"] + XBAR1_IRQ_2_3 = 144, + #[doc = "145 - ADC_ETC_IRQ0"] + ADC_ETC_IRQ0 = 145, + #[doc = "146 - ADC_ETC_IRQ1"] + ADC_ETC_IRQ1 = 146, + #[doc = "147 - ADC_ETC_IRQ2"] + ADC_ETC_IRQ2 = 147, + #[doc = "148 - ADC_ETC_IRQ3"] + ADC_ETC_IRQ3 = 148, + #[doc = "149 - ADC_ETC_ERROR_IRQ"] + ADC_ETC_ERROR_IRQ = 149, + #[doc = "155 - PIT1"] + PIT1 = 155, + #[doc = "156 - PIT2"] + PIT2 = 156, + #[doc = "157 - ACMP1"] + ACMP1 = 157, + #[doc = "158 - ACMP2"] + ACMP2 = 158, + #[doc = "159 - ACMP3"] + ACMP3 = 159, + #[doc = "160 - ACMP4"] + ACMP4 = 160, + #[doc = "165 - ENC1"] + ENC1 = 165, + #[doc = "166 - ENC2"] + ENC2 = 166, + #[doc = "167 - ENC3"] + ENC3 = 167, + #[doc = "168 - ENC4"] + ENC4 = 168, + #[doc = "171 - TMR1"] + TMR1 = 171, + #[doc = "172 - TMR2"] + TMR2 = 172, + #[doc = "173 - TMR3"] + TMR3 = 173, + #[doc = "174 - TMR4"] + TMR4 = 174, + #[doc = "175 - SEMA4_CP0"] + SEMA4_CP0 = 175, + #[doc = "176 - SEMA4_CP1"] + SEMA4_CP1 = 176, + #[doc = "177 - PWM2_0"] + PWM2_0 = 177, + #[doc = "178 - PWM2_1"] + PWM2_1 = 178, + #[doc = "179 - PWM2_2"] + PWM2_2 = 179, + #[doc = "180 - PWM2_3"] + PWM2_3 = 180, + #[doc = "181 - PWM2_FAULT"] + PWM2_FAULT = 181, + #[doc = "182 - PWM3_0"] + PWM3_0 = 182, + #[doc = "183 - PWM3_1"] + PWM3_1 = 183, + #[doc = "184 - PWM3_2"] + PWM3_2 = 184, + #[doc = "185 - PWM3_3"] + PWM3_3 = 185, + #[doc = "186 - PWM3_FAULT"] + PWM3_FAULT = 186, + #[doc = "187 - PWM4_0"] + PWM4_0 = 187, + #[doc = "188 - PWM4_1"] + PWM4_1 = 188, + #[doc = "189 - PWM4_2"] + PWM4_2 = 189, + #[doc = "190 - PWM4_3"] + PWM4_3 = 190, + #[doc = "191 - PWM4_FAULT"] + PWM4_FAULT = 191, + #[doc = "200 - PDM_HWVAD_EVENT"] + PDM_HWVAD_EVENT = 200, + #[doc = "201 - PDM_HWVAD_ERROR"] + PDM_HWVAD_ERROR = 201, + #[doc = "202 - PDM_EVENT"] + PDM_EVENT = 202, + #[doc = "203 - PDM_ERROR"] + PDM_ERROR = 203, + #[doc = "204 - EMVSIM1"] + EMVSIM1 = 204, + #[doc = "205 - EMVSIM2"] + EMVSIM2 = 205, + #[doc = "206 - MECC1_INT"] + MECC1_INT = 206, + #[doc = "207 - MECC1_FATAL_INT"] + MECC1_FATAL_INT = 207, + #[doc = "208 - MECC2_INT"] + MECC2_INT = 208, + #[doc = "209 - MECC2_FATAL_INT"] + MECC2_FATAL_INT = 209, + #[doc = "210 - XECC_FLEXSPI1_INT"] + XECC_FLEXSPI1_INT = 210, + #[doc = "211 - XECC_FLEXSPI1_FATAL_INT"] + XECC_FLEXSPI1_FATAL_INT = 211, + #[doc = "212 - XECC_FLEXSPI2_INT"] + XECC_FLEXSPI2_INT = 212, + #[doc = "213 - XECC_FLEXSPI2_FATAL_INT"] + XECC_FLEXSPI2_FATAL_INT = 213, + #[doc = "214 - XECC_SEMC_INT"] + XECC_SEMC_INT = 214, + #[doc = "215 - XECC_SEMC_FATAL_INT"] + XECC_SEMC_FATAL_INT = 215, + #[doc = "216 - ENET_QOS"] + ENET_QOS = 216, + #[doc = "217 - ENET_QOS_PMT"] + ENET_QOS_PMT = 217, +} +pub type interrupt = Interrupt; +unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt { + #[inline(always)] + fn number(self) -> u16 { + self as u16 + } +} + +mod _vectors { + unsafe extern "C" { + fn DMA0_DMA16(); + fn DMA1_DMA17(); + fn DMA2_DMA18(); + fn DMA3_DMA19(); + fn DMA4_DMA20(); + fn DMA5_DMA21(); + fn DMA6_DMA22(); + fn DMA7_DMA23(); + fn DMA8_DMA24(); + fn DMA9_DMA25(); + fn DMA10_DMA26(); + fn DMA11_DMA27(); + fn DMA12_DMA28(); + fn DMA13_DMA29(); + fn DMA14_DMA30(); + fn DMA15_DMA31(); + fn DMA_ERROR(); + fn CTI_TRIGGER_OUT0(); + fn CTI_TRIGGER_OUT1(); + fn CORE(); + fn LPUART1(); + fn LPUART2(); + fn LPUART3(); + fn LPUART4(); + fn LPUART5(); + fn LPUART6(); + fn LPUART7(); + fn LPUART8(); + fn LPUART9(); + fn LPUART10(); + fn LPUART11(); + fn LPUART12(); + fn LPI2C1(); + fn LPI2C2(); + fn LPI2C3(); + fn LPI2C4(); + fn LPI2C5(); + fn LPI2C6(); + fn LPSPI1(); + fn LPSPI2(); + fn LPSPI3(); + fn LPSPI4(); + fn LPSPI5(); + fn LPSPI6(); + fn CAN1(); + fn CAN1_ERROR(); + fn CAN2(); + fn CAN2_ERROR(); + fn CAN3(); + fn CAN3_ERROR(); + fn FLEXRAM(); + fn KPP(); + fn GPR_IRQ(); + fn ELCDIF(); + fn LCDIFV2(); + fn CSI(); + fn PXP(); + fn MIPI_CSI(); + fn MIPI_DSI(); + fn GPIO6_COMBINED_0_15(); + fn GPIO6_COMBINED_16_31(); + fn DAC(); + fn KEY_MANAGER(); + fn WDOG2(); + fn SNVS_HP_NON_TZ(); + fn SNVS_HP_TZ(); + fn SNVS_PULSE_EVENT(); + fn CAAM_IRQ0(); + fn CAAM_IRQ1(); + fn CAAM_IRQ2(); + fn CAAM_IRQ3(); + fn CAAM_RECORVE_ERRPR(); + fn CAAM_RTIC(); + fn CDOG(); + fn SAI1(); + fn SAI2(); + fn SAI3_RX(); + fn SAI3_TX(); + fn SAI4_RX(); + fn SAI4_TX(); + fn SPDIF(); + fn TMPSNS_INT(); + fn TMPSNS_LOW_HIGH(); + fn TMPSNS_PANIC(); + fn LPSR_LP8_BROWNOUT(); + fn LPSR_LP0_BROWNOUT(); + fn ADC1(); + fn ADC2(); + fn USBPHY1(); + fn USBPHY2(); + fn RDC(); + fn GPIO13_COMBINED_0_31(); + fn DCIC1(); + fn DCIC2(); + fn ASRC(); + fn FLEXRAM_ECC(); + fn CM7_GPIO2_3(); + fn GPIO1_COMBINED_0_15(); + fn GPIO1_COMBINED_16_31(); + fn GPIO2_COMBINED_0_15(); + fn GPIO2_COMBINED_16_31(); + fn GPIO3_COMBINED_0_15(); + fn GPIO3_COMBINED_16_31(); + fn GPIO4_COMBINED_0_15(); + fn GPIO4_COMBINED_16_31(); + fn GPIO5_COMBINED_0_15(); + fn GPIO5_COMBINED_16_31(); + fn FLEXIO1(); + fn FLEXIO2(); + fn WDOG1(); + fn RTWDOG3(); + fn EWM(); + fn OCOTP_READ_FUSE_ERROR(); + fn OCOTP_READ_DONE_ERROR(); + fn GPC(); + fn MUA(); + fn GPT1(); + fn GPT2(); + fn GPT3(); + fn GPT4(); + fn GPT5(); + fn GPT6(); + fn PWM1_0(); + fn PWM1_1(); + fn PWM1_2(); + fn PWM1_3(); + fn PWM1_FAULT(); + fn FLEXSPI1(); + fn FLEXSPI2(); + fn SEMC(); + fn USDHC1(); + fn USDHC2(); + fn USB_OTG2(); + fn USB_OTG1(); + fn ENET(); + fn ENET_1588_TIMER(); + fn ENET_1G_MAC0_TX_RX_1(); + fn ENET_1G_MAC0_TX_RX_2(); + fn ENET_1G(); + fn ENET_1G_1588_TIMER(); + fn XBAR1_IRQ_0_1(); + fn XBAR1_IRQ_2_3(); + fn ADC_ETC_IRQ0(); + fn ADC_ETC_IRQ1(); + fn ADC_ETC_IRQ2(); + fn ADC_ETC_IRQ3(); + fn ADC_ETC_ERROR_IRQ(); + fn PIT1(); + fn PIT2(); + fn ACMP1(); + fn ACMP2(); + fn ACMP3(); + fn ACMP4(); + fn ENC1(); + fn ENC2(); + fn ENC3(); + fn ENC4(); + fn TMR1(); + fn TMR2(); + fn TMR3(); + fn TMR4(); + fn SEMA4_CP0(); + fn SEMA4_CP1(); + fn PWM2_0(); + fn PWM2_1(); + fn PWM2_2(); + fn PWM2_3(); + fn PWM2_FAULT(); + fn PWM3_0(); + fn PWM3_1(); + fn PWM3_2(); + fn PWM3_3(); + fn PWM3_FAULT(); + fn PWM4_0(); + fn PWM4_1(); + fn PWM4_2(); + fn PWM4_3(); + fn PWM4_FAULT(); + fn PDM_HWVAD_EVENT(); + fn PDM_HWVAD_ERROR(); + fn PDM_EVENT(); + fn PDM_ERROR(); + fn EMVSIM1(); + fn EMVSIM2(); + fn MECC1_INT(); + fn MECC1_FATAL_INT(); + fn MECC2_INT(); + fn MECC2_FATAL_INT(); + fn XECC_FLEXSPI1_INT(); + fn XECC_FLEXSPI1_FATAL_INT(); + fn XECC_FLEXSPI2_INT(); + fn XECC_FLEXSPI2_FATAL_INT(); + fn XECC_SEMC_INT(); + fn XECC_SEMC_FATAL_INT(); + fn ENET_QOS(); + fn ENET_QOS_PMT(); + } + pub union Vector { + _handler: unsafe extern "C" fn(), + _reserved: u32, + } + #[cfg_attr(target_os = "none", unsafe(link_section = ".vector_table.interrupts"))] + #[unsafe(no_mangle)] + pub static __INTERRUPTS: [Vector; 218] = [ + Vector { + _handler: DMA0_DMA16, + }, + Vector { + _handler: DMA1_DMA17, + }, + Vector { + _handler: DMA2_DMA18, + }, + Vector { + _handler: DMA3_DMA19, + }, + Vector { + _handler: DMA4_DMA20, + }, + Vector { + _handler: DMA5_DMA21, + }, + Vector { + _handler: DMA6_DMA22, + }, + Vector { + _handler: DMA7_DMA23, + }, + Vector { + _handler: DMA8_DMA24, + }, + Vector { + _handler: DMA9_DMA25, + }, + Vector { + _handler: DMA10_DMA26, + }, + Vector { + _handler: DMA11_DMA27, + }, + Vector { + _handler: DMA12_DMA28, + }, + Vector { + _handler: DMA13_DMA29, + }, + Vector { + _handler: DMA14_DMA30, + }, + Vector { + _handler: DMA15_DMA31, + }, + Vector { + _handler: DMA_ERROR, + }, + Vector { + _handler: CTI_TRIGGER_OUT0, + }, + Vector { + _handler: CTI_TRIGGER_OUT1, + }, + Vector { _handler: CORE }, + Vector { _handler: LPUART1 }, + Vector { _handler: LPUART2 }, + Vector { _handler: LPUART3 }, + Vector { _handler: LPUART4 }, + Vector { _handler: LPUART5 }, + Vector { _handler: LPUART6 }, + Vector { _handler: LPUART7 }, + Vector { _handler: LPUART8 }, + Vector { _handler: LPUART9 }, + Vector { _handler: LPUART10 }, + Vector { _handler: LPUART11 }, + Vector { _handler: LPUART12 }, + Vector { _handler: LPI2C1 }, + Vector { _handler: LPI2C2 }, + Vector { _handler: LPI2C3 }, + Vector { _handler: LPI2C4 }, + Vector { _handler: LPI2C5 }, + Vector { _handler: LPI2C6 }, + Vector { _handler: LPSPI1 }, + Vector { _handler: LPSPI2 }, + Vector { _handler: LPSPI3 }, + Vector { _handler: LPSPI4 }, + Vector { _handler: LPSPI5 }, + Vector { _handler: LPSPI6 }, + Vector { _handler: CAN1 }, + Vector { + _handler: CAN1_ERROR, + }, + Vector { _handler: CAN2 }, + Vector { + _handler: CAN2_ERROR, + }, + Vector { _handler: CAN3 }, + Vector { + _handler: CAN3_ERROR, + }, + Vector { _handler: FLEXRAM }, + Vector { _handler: KPP }, + Vector { _reserved: 0 }, + Vector { _handler: GPR_IRQ }, + Vector { _handler: ELCDIF }, + Vector { _handler: LCDIFV2 }, + Vector { _handler: CSI }, + Vector { _handler: PXP }, + Vector { _handler: MIPI_CSI }, + Vector { _handler: MIPI_DSI }, + Vector { _reserved: 0 }, + Vector { + _handler: GPIO6_COMBINED_0_15, + }, + Vector { + _handler: GPIO6_COMBINED_16_31, + }, + Vector { _handler: DAC }, + Vector { + _handler: KEY_MANAGER, + }, + Vector { _handler: WDOG2 }, + Vector { + _handler: SNVS_HP_NON_TZ, + }, + Vector { + _handler: SNVS_HP_TZ, + }, + Vector { + _handler: SNVS_PULSE_EVENT, + }, + Vector { + _handler: CAAM_IRQ0, + }, + Vector { + _handler: CAAM_IRQ1, + }, + Vector { + _handler: CAAM_IRQ2, + }, + Vector { + _handler: CAAM_IRQ3, + }, + Vector { + _handler: CAAM_RECORVE_ERRPR, + }, + Vector { + _handler: CAAM_RTIC, + }, + Vector { _handler: CDOG }, + Vector { _handler: SAI1 }, + Vector { _handler: SAI2 }, + Vector { _handler: SAI3_RX }, + Vector { _handler: SAI3_TX }, + Vector { _handler: SAI4_RX }, + Vector { _handler: SAI4_TX }, + Vector { _handler: SPDIF }, + Vector { + _handler: TMPSNS_INT, + }, + Vector { + _handler: TMPSNS_LOW_HIGH, + }, + Vector { + _handler: TMPSNS_PANIC, + }, + Vector { + _handler: LPSR_LP8_BROWNOUT, + }, + Vector { + _handler: LPSR_LP0_BROWNOUT, + }, + Vector { _handler: ADC1 }, + Vector { _handler: ADC2 }, + Vector { _handler: USBPHY1 }, + Vector { _handler: USBPHY2 }, + Vector { _handler: RDC }, + Vector { + _handler: GPIO13_COMBINED_0_31, + }, + Vector { _reserved: 0 }, + Vector { _handler: DCIC1 }, + Vector { _handler: DCIC2 }, + Vector { _handler: ASRC }, + Vector { + _handler: FLEXRAM_ECC, + }, + Vector { + _handler: CM7_GPIO2_3, + }, + Vector { + _handler: GPIO1_COMBINED_0_15, + }, + Vector { + _handler: GPIO1_COMBINED_16_31, + }, + Vector { + _handler: GPIO2_COMBINED_0_15, + }, + Vector { + _handler: GPIO2_COMBINED_16_31, + }, + Vector { + _handler: GPIO3_COMBINED_0_15, + }, + Vector { + _handler: GPIO3_COMBINED_16_31, + }, + Vector { + _handler: GPIO4_COMBINED_0_15, + }, + Vector { + _handler: GPIO4_COMBINED_16_31, + }, + Vector { + _handler: GPIO5_COMBINED_0_15, + }, + Vector { + _handler: GPIO5_COMBINED_16_31, + }, + Vector { _handler: FLEXIO1 }, + Vector { _handler: FLEXIO2 }, + Vector { _handler: WDOG1 }, + Vector { _handler: RTWDOG3 }, + Vector { _handler: EWM }, + Vector { + _handler: OCOTP_READ_FUSE_ERROR, + }, + Vector { + _handler: OCOTP_READ_DONE_ERROR, + }, + Vector { _handler: GPC }, + Vector { _handler: MUA }, + Vector { _handler: GPT1 }, + Vector { _handler: GPT2 }, + Vector { _handler: GPT3 }, + Vector { _handler: GPT4 }, + Vector { _handler: GPT5 }, + Vector { _handler: GPT6 }, + Vector { _handler: PWM1_0 }, + Vector { _handler: PWM1_1 }, + Vector { _handler: PWM1_2 }, + Vector { _handler: PWM1_3 }, + Vector { + _handler: PWM1_FAULT, + }, + Vector { _handler: FLEXSPI1 }, + Vector { _handler: FLEXSPI2 }, + Vector { _handler: SEMC }, + Vector { _handler: USDHC1 }, + Vector { _handler: USDHC2 }, + Vector { _handler: USB_OTG2 }, + Vector { _handler: USB_OTG1 }, + Vector { _handler: ENET }, + Vector { + _handler: ENET_1588_TIMER, + }, + Vector { + _handler: ENET_1G_MAC0_TX_RX_1, + }, + Vector { + _handler: ENET_1G_MAC0_TX_RX_2, + }, + Vector { _handler: ENET_1G }, + Vector { + _handler: ENET_1G_1588_TIMER, + }, + Vector { + _handler: XBAR1_IRQ_0_1, + }, + Vector { + _handler: XBAR1_IRQ_2_3, + }, + Vector { + _handler: ADC_ETC_IRQ0, + }, + Vector { + _handler: ADC_ETC_IRQ1, + }, + Vector { + _handler: ADC_ETC_IRQ2, + }, + Vector { + _handler: ADC_ETC_IRQ3, + }, + Vector { + _handler: ADC_ETC_ERROR_IRQ, + }, + Vector { _reserved: 0 }, + Vector { _reserved: 0 }, + Vector { _reserved: 0 }, + Vector { _reserved: 0 }, + Vector { _reserved: 0 }, + Vector { _handler: PIT1 }, + Vector { _handler: PIT2 }, + Vector { _handler: ACMP1 }, + Vector { _handler: ACMP2 }, + Vector { _handler: ACMP3 }, + Vector { _handler: ACMP4 }, + Vector { _reserved: 0 }, + Vector { _reserved: 0 }, + Vector { _reserved: 0 }, + Vector { _reserved: 0 }, + Vector { _handler: ENC1 }, + Vector { _handler: ENC2 }, + Vector { _handler: ENC3 }, + Vector { _handler: ENC4 }, + Vector { _reserved: 0 }, + Vector { _reserved: 0 }, + Vector { _handler: TMR1 }, + Vector { _handler: TMR2 }, + Vector { _handler: TMR3 }, + Vector { _handler: TMR4 }, + Vector { + _handler: SEMA4_CP0, + }, + Vector { + _handler: SEMA4_CP1, + }, + Vector { _handler: PWM2_0 }, + Vector { _handler: PWM2_1 }, + Vector { _handler: PWM2_2 }, + Vector { _handler: PWM2_3 }, + Vector { + _handler: PWM2_FAULT, + }, + Vector { _handler: PWM3_0 }, + Vector { _handler: PWM3_1 }, + Vector { _handler: PWM3_2 }, + Vector { _handler: PWM3_3 }, + Vector { + _handler: PWM3_FAULT, + }, + Vector { _handler: PWM4_0 }, + Vector { _handler: PWM4_1 }, + Vector { _handler: PWM4_2 }, + Vector { _handler: PWM4_3 }, + Vector { + _handler: PWM4_FAULT, + }, + Vector { _reserved: 0 }, + Vector { _reserved: 0 }, + Vector { _reserved: 0 }, + Vector { _reserved: 0 }, + Vector { _reserved: 0 }, + Vector { _reserved: 0 }, + Vector { _reserved: 0 }, + Vector { _reserved: 0 }, + Vector { + _handler: PDM_HWVAD_EVENT, + }, + Vector { + _handler: PDM_HWVAD_ERROR, + }, + Vector { + _handler: PDM_EVENT, + }, + Vector { + _handler: PDM_ERROR, + }, + Vector { _handler: EMVSIM1 }, + Vector { _handler: EMVSIM2 }, + Vector { + _handler: MECC1_INT, + }, + Vector { + _handler: MECC1_FATAL_INT, + }, + Vector { + _handler: MECC2_INT, + }, + Vector { + _handler: MECC2_FATAL_INT, + }, + Vector { + _handler: XECC_FLEXSPI1_INT, + }, + Vector { + _handler: XECC_FLEXSPI1_FATAL_INT, + }, + Vector { + _handler: XECC_FLEXSPI2_INT, + }, + Vector { + _handler: XECC_FLEXSPI2_FATAL_INT, + }, + Vector { + _handler: XECC_SEMC_INT, + }, + Vector { + _handler: XECC_SEMC_FATAL_INT, + }, + Vector { _handler: ENET_QOS }, + Vector { + _handler: ENET_QOS_PMT, + }, + ]; +} |