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|
use ral_registers::{Instance, register};
#[repr(C)]
#[allow(non_snake_case)]
pub struct RegisterBlock {
pub PLL_ARM: u32,
pub PLL_ARM_SET: u32,
pub PLL_ARM_CLR: u32,
pub PLL_ARM_TOG: u32,
pub PLL_USB1: u32,
pub PLL_USB1_SET: u32,
pub PLL_USB1_CLR: u32,
pub PLL_USB1_TOG: u32,
pub PLL_USB2: u32,
pub PLL_USB2_SET: u32,
pub PLL_USB2_CLR: u32,
pub PLL_USB2_TOG: u32,
pub PLL_SYS: u32,
pub PLL_SYS_SET: u32,
pub PLL_SYS_CLR: u32,
pub PLL_SYS_TOG: u32,
pub PLL_SYS_SS: u32,
_reserved0: [u8; 12],
pub PLL_SYS_NUM: u32,
_reserved1: [u8; 12],
pub PLL_SYS_DENOM: u32,
_reserved2: [u8; 12],
pub PLL_AUDIO: u32,
pub PLL_AUDIO_SET: u32,
pub PLL_AUDIO_CLR: u32,
pub PLL_AUDIO_TOG: u32,
pub PLL_AUDIO_NUM: u32,
_reserved3: [u8; 12],
pub PLL_AUDIO_DENOM: u32,
_reserved4: [u8; 12],
pub PLL_VIDEO: u32,
pub PLL_VIDEO_SET: u32,
pub PLL_VIDEO_CLR: u32,
pub PLL_VIDEO_TOG: u32,
pub PLL_VIDEO_NUM: u32,
_reserved5: [u8; 12],
pub PLL_VIDEO_DENOM: u32,
_reserved6: [u8; 28],
pub PLL_ENET: u32,
pub PLL_ENET_SET: u32,
pub PLL_ENET_CLR: u32,
pub PLL_ENET_TOG: u32,
pub PFD_480: u32,
pub PFD_480_SET: u32,
pub PFD_480_CLR: u32,
pub PFD_480_TOG: u32,
pub PFD_528: u32,
pub PFD_528_SET: u32,
pub PFD_528_CLR: u32,
pub PFD_528_TOG: u32,
_reserved7: [u8; 64],
pub MISC0: u32,
pub MISC0_SET: u32,
pub MISC0_CLR: u32,
pub MISC0_TOG: u32,
pub MISC1: u32,
pub MISC1_SET: u32,
pub MISC1_CLR: u32,
pub MISC1_TOG: u32,
pub MISC2: u32,
pub MISC2_SET: u32,
pub MISC2_CLR: u32,
pub MISC2_TOG: u32,
}
/// A CCM\_ANALOG instance.
#[allow(non_camel_case_types)]
pub type CCM_ANALOG = Instance<RegisterBlock>;
register!(pub PLL_USB1<u32> RW [
LOCK start(31) width(1) RW {}
BYPASS start(16) width(1) RW {}
ENABLE start(13) width(1) RW {}
POWER start(12) width(1) RW {}
EN_USB_CLKS start(6) width(1) RW {}
]);
pub use PLL_USB1 as PLL_USB1_SET;
pub use PLL_USB1 as PLL_USB1_CLR;
pub use PLL_USB1 as PLL_USB2;
pub use PLL_USB2 as PLL_USB2_SET;
pub use PLL_USB2 as PLL_USB2_CLR;
register!(pub PLL_ARM<u32> RW [
LOCK start(31) width(1) RW {}
ENABLE start(13) width(1) RW {}
POWERDOWN start(12) width(1) RW {}
DIV_SELECT start(0) width(7) RW {}
]);
pub use PLL_ARM as PLL_ARM_SET;
register!(pub PLL_ENET<u32> RW [
LOCK start(31) width(1) RW {}
ENET_500M_REF_EN start(22) width(1) RW {}
POWERDOWN start(12) width(1) RW {}
BYPASS start(16) width(1) RW {}
BYPASS_CLK_SRC start(14) width(2) RW {}
ENABLE start(13) width(1) RW {}
DIV_SELECT start(0) width(2) RW {
DIV_25MHZ = 0,
DIV_50MHZ = 1,
DIV_100MHZ = 2,
DIV_125MHZ = 3,
}
]);
register!(pub PLL_SYS<u32> RW [
LOCK start(31) width(1) RW {}
BYPASS start(16) width(1) RW {}
ENABLE start(13) width(1) RW {}
POWERDOWN start(12) width(1) RW {}
]);
pub use PLL_SYS as PLL_SYS_SET;
pub use PLL_SYS as PLL_SYS_CLR;
register!(pub PFD_480<u32> RW [
PFD3_FRAC start(24) width(6) RW {}
PFD2_FRAC start(16) width(6) RW {}
PFD1_FRAC start(8) width(6) RW {}
PFD0_FRAC start(0) width(6) RW {}
]);
pub use PFD_480 as PFD_528;
|
