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authorIan McIntyre <me@mciantyre.dev>2025-12-13 13:30:49 -0500
committerIan McIntyre <me@mciantyre.dev>2025-12-13 13:39:35 -0500
commit7514ffe3b565669f6535ce05826613a884fb0665 (patch)
treee400aab5b130409733b2aac1091321fab3b425d7 /src/lib.rs
parentfe3e7300fe42013705144712843c80d1f198a253 (diff)
Support ISSI LP and WP configs in one algo
The configurations and sequences need to vary depending on the connected part. We can determine the part at runtime to vary the config. We could probably do this for all the parts. Maybe I'll try that later.
Diffstat (limited to 'src/lib.rs')
-rw-r--r--src/lib.rs24
1 files changed, 24 insertions, 0 deletions
diff --git a/src/lib.rs b/src/lib.rs
index 38ae43e..15e835b 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -24,6 +24,7 @@ pub mod flash {
const CHIP_ERASE: IpCmd = IpCmd::new(SeqId::Seq11, 2).unwrap();
const SET_READ_PARAMS: IpCmd = IpCmd::new(SeqId::Seq02, 1).unwrap();
+ const READ_ID_JEDEC_ID: IpCmd = IpCmd::new(SeqId::Seq04, 1).unwrap();
const RESET: IpCmd = IpCmd::new(SeqId::Seq07, 2).unwrap();
const PAGE_SIZE_BYTES: usize = 256;
@@ -116,6 +117,29 @@ pub mod flash {
wait_for_wip_clear(flexspi);
}
+ #[derive(Debug, Clone, Copy, PartialEq, defmt::Format)]
+ pub struct JedecId {
+ pub mnf_id: u8,
+ pub mem_type: u8,
+ pub cap: u8,
+ }
+
+ /// Read the JEDEC ID.
+ pub fn read_jedec_id(flexspi: flexspi::Instance) -> JedecId {
+ let mut buffer = [0_u8; 3];
+ crate::start_ip_cmd(flexspi, READ_ID_JEDEC_ID, 0, &buffer);
+ crate::receive_bytes(flexspi, &mut buffer);
+ crate::wait_for_ip_cmd_done(flexspi);
+ crate::clear_rx_fifo(flexspi);
+ crate::wait_for_idle(flexspi);
+
+ JedecId {
+ mnf_id: buffer[0],
+ mem_type: buffer[1],
+ cap: buffer[2],
+ }
+ }
+
/// Produce chunks of bytes suitable for page aligned writing.
fn aligned_chunks(start: usize, bytes: &[u8], page_size: usize) -> impl Iterator<Item = &[u8]> {
let next_page_start = page_size - (start % page_size);