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authorIan McIntyre <me@mciantyre.dev>2026-05-14 10:53:05 -0400
committerIan McIntyre <me@mciantyre.dev>2026-05-23 12:06:31 -0400
commit022639f277d08c5b61fc805d57d34cec4efaba5a (patch)
tree3863626273f5cf269a6fae4be15dc83ce2ec3b2c /src/sequences
parentd2c0250287727d7766f234c7638a587892426978 (diff)
Write the QE bit for ISSI parts
If it's not already set, our quad reads & writes are not going to work.
Diffstat (limited to 'src/sequences')
-rw-r--r--src/sequences/common.rs8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/sequences/common.rs b/src/sequences/common.rs
index 1c93067..1fe958b 100644
--- a/src/sequences/common.rs
+++ b/src/sequences/common.rs
@@ -96,3 +96,11 @@ pub const SEQ_READ_READ_PARAMS: Sequence = {
instr[1] = Instr::new(SDR_READ, Pads::One, 0);
Sequence(instr)
};
+
+/// Write the status register.
+pub const SEQ_WRITE_STATUS: Sequence = {
+ let mut instr = [Instr::STOP; _];
+ instr[0] = Instr::new(SDR_CMD, Pads::One, 0x01);
+ instr[1] = Instr::new(SDR_WRITE, Pads::One, 0);
+ Sequence(instr)
+};