Book: Major rework for RTIC v2

1 files changed, 7 insertions, 5 deletions

diff --git a/book/en/src/by-example.md b/book/en/src/by-example.md
index 419a4ba..a2e5b27 100644
--- a/book/en/src/by-example.md
+++ b/book/en/src/by-example.md
@@ -1,14 +1,15 @@
 # RTIC by example
 
-This part of the book introduces the Real-Time Interrupt-driven Concurrency (RTIC) framework
-to new users by walking them through examples of increasing complexity.
+This part of the book introduces the RTIC framework to new users by walking them through examples of increasing complexity.
 
 All examples in this part of the book are accessible at the
 [GitHub repository][repoexamples].
 The examples are runnable on QEMU (emulating a Cortex M3 target),
 thus no special hardware required to follow along.
 
-[repoexamples]: https://github.com/rtic-rs/cortex-m-rtic/tree/master/examples
+[repoexamples]: https://github.com/rtic-rs/rtic/tree/master/examples
+
+## Running an example
 
 To run the examples with QEMU you will need the `qemu-system-arm` program.
 Check [the embedded Rust book] for instructions on how to set up an
@@ -28,11 +29,12 @@ $ cargo run --target thumbv7m-none-eabi --example locals
 Yields this output:
 
 ``` console
-{{#include ../../../ci/expected/locals.run}}
+{{#include ../../../rtic/ci/expected/locals.run}}
 ```
 
 > **NOTE**: You can choose target device by passing a target
 > triple to cargo (e.g. `cargo run --example init --target thumbv7m-none-eabi`) or
 > configure a default target in `.cargo/config.toml`.
 >
-> For running the examples, we use a Cortex M3 emulated in QEMU, so the target is `thumbv7m-none-eabi`.
\ No newline at end of file
+> For running the examples, we (typically) use a Cortex M3 emulated in QEMU, so the target is `thumbv7m-none-eabi`.
+> Since the M3 architecture is backwards compatible to the M0/M0+ architecture, you may also use the `thumbv6m-none-eabi`, in case you want to inspect generated assembly code for the M0/M0+ architecture.