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| author | Román Cárdenas Rodríguez <rcardenas.rod@gmail.com> | 2024-03-20 21:06:47 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-03-20 20:06:47 +0000 |
| commit | 4060c3def88f82d4e4f48de7137ce365167ef265 (patch) | |
| tree | f326f0687092cab2b772952b579d63d12d3d34aa /ci/expected/hifive1 | |
| parent | 22ac33a826dedacde5d3d5c0964ff072555a9b32 (diff) | |
RISC-V support over CLINT (#815)
* Rebase to master
* using interrupt_mod
* bug fixes
* fix other backends
* Add changelog
* forgot about rtic-macros
* backend-specific configuration
* core peripherals optional over macro argument
* pre_init_preprocessing binding
* CI for RISC-V (WIP)
* separation of concerns
* add targets for RISC-V examples
* remove qemu feature
* prepare examples folder
* move examples all together
* move ci out of examples
* minor changes
* add cortex-m
* new xtask: proof of concept
* fix build.yml
* feature typo
* clean rtic examples
* reproduce weird issue
* remove unsafe code in user app
* update dependencies
* allow builds on riscv32imc
* let's fix QEMU
* Update .github/workflows/build.yml
Co-authored-by: Henrik Tjäder <henrik@tjaders.com>
* New build.rs
* removing test features
* adapt ui test to new version of clippy
* add more examples to RISC-V backend
* proper configuration of heapless for riscv32imc
* opt-out examples for riscv32imc
* point to new version of riscv-slic
* adapt new macro bindings
* adapt examples and CI to stable
* fix cortex-m CI
* Review
---------
Co-authored-by: Henrik Tjäder <henrik@tjaders.com>
Diffstat (limited to 'ci/expected/hifive1')
| -rw-r--r-- | ci/expected/hifive1/prio_inheritance.run | 17 | ||||
| -rw-r--r-- | ci/expected/hifive1/static.run | 3 | ||||
| -rw-r--r-- | ci/expected/hifive1/task.run | 5 | ||||
| -rw-r--r-- | ci/expected/hifive1/zero_prio_task.run | 3 |
4 files changed, 28 insertions, 0 deletions
diff --git a/ci/expected/hifive1/prio_inheritance.run b/ci/expected/hifive1/prio_inheritance.run new file mode 100644 index 0000000..c60b241 --- /dev/null +++ b/ci/expected/hifive1/prio_inheritance.run @@ -0,0 +1,17 @@ +[Idle]: Started + [SoftMedium]: Started + [SoftMedium]: Shared: 1 + [SoftHigh]: Started + [SoftHigh]: Shared: 2 + [SoftHigh]: Finished + [SoftMedium]: Finished + [SoftLow1]: Started + [SoftLow1]: Shared: 3 + [SoftLow1]: Yield + [SoftLow2]: Started + [SoftLow2]: Shared: 4 + [SoftLow2]: Yield + [SoftLow1]: Finished + [SoftLow2]: Finished +[Idle]: Shared: 4 +[Idle]: Finished diff --git a/ci/expected/hifive1/static.run b/ci/expected/hifive1/static.run new file mode 100644 index 0000000..3d3f46f --- /dev/null +++ b/ci/expected/hifive1/static.run @@ -0,0 +1,3 @@ +received message: 1 +received message: 2 +received message: 3 diff --git a/ci/expected/hifive1/task.run b/ci/expected/hifive1/task.run new file mode 100644 index 0000000..de45dce --- /dev/null +++ b/ci/expected/hifive1/task.run @@ -0,0 +1,5 @@ +foo - start +foo - middle +baz +foo - end +bar diff --git a/ci/expected/hifive1/zero_prio_task.run b/ci/expected/hifive1/zero_prio_task.run new file mode 100644 index 0000000..123b0f2 --- /dev/null +++ b/ci/expected/hifive1/zero_prio_task.run @@ -0,0 +1,3 @@ +init +hello from async +hello from async2 |