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authoronsdagens <112828711+onsdagens@users.noreply.github.com>2024-09-29 06:21:14 +0200
committerGitHub <noreply@github.com>2024-09-29 04:21:14 +0000
commit805ea267a8515b7ee70125f444763f4aaa95c454 (patch)
treeb5cb20e1db8aca4ffa4ae45b8a81cf7da1a28931 /ci/expected
parent6e68a5e6157204df4c79b0ea14a248cc8182863a (diff)
Add SYSTIMER based ESP32-C3 monotonic (#972)
* add esp32c3 monotonic * fix tests
Diffstat (limited to 'ci/expected')
-rw-r--r--ci/expected/esp32c3/monotonic.run34
1 files changed, 34 insertions, 0 deletions
diff --git a/ci/expected/esp32c3/monotonic.run b/ci/expected/esp32c3/monotonic.run
new file mode 100644
index 0000000..9bf82bd
--- /dev/null
+++ b/ci/expected/esp32c3/monotonic.run
@@ -0,0 +1,34 @@
+QEMU 8.2.0 monitor - type 'help' for more information
+(qemu) q
+ESP-ROM:esp32c3-api1-20210207
+Build:Feb 7 2021
+rst:0x1 (POWERON),boot:0x8 (SPI_FAST_FLASH_BOOT)
+SPIWP:0xee
+mode:DIO, clock div:2
+load:0x3fcd5820,len:0x1714
+load:0x403cc710,len:0x968
+load:0x403ce710,len:0x2f9c
+entry 0x403cc710
+I (0) boot: ESP-IDF v5.1.2-342-gbcf1645e44 2nd stage bootloader
+I (0) boot: compile time Dec 12 2023 10:50:58
+I (0) boot: chip revision: v0.3
+I (0) boot.esp32c3: SPI Speed : 40MHz
+I (0) boot.esp32c3: SPI Mode : SLOW READ
+I (0) boot.esp32c3: SPI Flash Size : 4MB
+I (0) boot: Enabling RNG early entropy source...
+I (1) boot: Partition Table:
+I (1) boot: ## Label Usage Type ST Offset Length
+I (1) boot: 0 nvs WiFi data 01 02 00009000 00006000
+I (1) boot: 1 phy_init RF data 01 01 0000f000 00001000
+I (1) boot: 2 factory factory app 00 00 00010000 003f0000
+I (1) boot: End of partition table
+I (1) esp_image: REDACTED
+I (3) esp_image: REDACTED
+I (3) esp_image: REDACTED
+I (8) esp_image: REDACTED
+I (11) boot: Loaded app from partition at offset 0x10000
+I (11) boot: Disabling RNG early entropy source...
+init
+hello from bar
+hello from baz
+hello from foo