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| author | cschuhen <47763321+cschuhen@users.noreply.github.com> | 2024-02-27 21:25:07 +1000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-02-27 11:25:07 +0000 |
| commit | b1467c62b4b4f61ce53b6572c30920a72550ea45 (patch) | |
| tree | f2e685383be2203ee96b7172f11f7bfcdb26d52a /examples/embassy-stm32g4/Cargo.toml | |
| parent | 27985009579e82673dcaf7a6a715fcf50c184863 (diff) | |
Add example of using Embassy HAL(stm32) with RTIC. (#891)
The RTIC book mentions Embassy+RTIC but gives no examples.
fmt.
Add feature flag
Seems CI does not deal with 2 levels of depth.
Forgot to stage.
Thumb m arch.
Co-authored-by: Corey Schuhen <cschuhen@gmail.com>
Diffstat (limited to 'examples/embassy-stm32g4/Cargo.toml')
| -rw-r--r-- | examples/embassy-stm32g4/Cargo.toml | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/examples/embassy-stm32g4/Cargo.toml b/examples/embassy-stm32g4/Cargo.toml new file mode 100644 index 0000000..f4efbe9 --- /dev/null +++ b/examples/embassy-stm32g4/Cargo.toml @@ -0,0 +1,36 @@ +[package] +edition = "2021" +name = "embassy-stm32g4-examples" +version = "0.1.0" +license = "MIT OR Apache-2.0" + +[workspace] + +[dependencies.rtic] +path="../../rtic" +version = "=2.0" +features = ["thumbv7-backend"] + +[dependencies.rtic-monotonics] +path="../../rtic-monotonics" +version = "=1.5" +features = ["cortex-m-systick"] + +[dependencies.rtic-sync] +path="../../rtic-sync" +version = "=1.3" + +[dependencies] +# Change stm32g431cb to your chip name, if necessary. Also change .cargo/config.toml +embassy-stm32 = { version = "0.1.0", features = [ "defmt", "time-driver-any", "stm32g431cb", "memory-x", "unstable-pac", "exti"] } + +defmt = "0.3" +defmt-rtt = "0.4" + +cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] } +cortex-m-rt = "0.7.0" +embedded-hal = "0.2.6" +panic-probe = { version = "0.3", features = ["print-defmt"] } + +[profile.release] +debug = 2 |