diff options
| author | Paul Bender <pebender@gmail.com> | 2025-09-13 15:17:36 -0700 |
|---|---|---|
| committer | Henrik Tjäder <henrik@tjaders.com> | 2025-09-17 18:57:09 +0000 |
| commit | e8c260a74577e1c1aadd1964e6f7e45afecd2e3e (patch) | |
| tree | ffeb5b476b145cfa0b703d9765dbab906daafccd /rtic-macros/src/codegen/bindings/esp32c6.rs | |
| parent | 1365471f5a3cf393a7525c98c96d04b9fcdb0b44 (diff) | |
Update esp32c{3,6} support to esp-hal-1.0.0-rc.0.
Diffstat (limited to 'rtic-macros/src/codegen/bindings/esp32c6.rs')
| -rw-r--r-- | rtic-macros/src/codegen/bindings/esp32c6.rs | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/rtic-macros/src/codegen/bindings/esp32c6.rs b/rtic-macros/src/codegen/bindings/esp32c6.rs index 263651b..2279cc0 100644 --- a/rtic-macros/src/codegen/bindings/esp32c6.rs +++ b/rtic-macros/src/codegen/bindings/esp32c6.rs @@ -15,8 +15,8 @@ mod esp32c6 { use syn::{parse, Attribute, Ident}; // esp-hal reserves interrupts 1-19: - // https://github.com/esp-rs/esp-hal/blob/esp-hal-v1.0.0-beta.0/esp-hal/src/interrupt/riscv.rs#L200 - // https://github.com/esp-rs/esp-hal/blob/esp-hal-v1.0.0-beta.0/esp-hal/src/interrupt/riscv.rs#L725 + // https://github.com/esp-rs/esp-hal/blob/esp-hal-v1.0.0-rc.0/esp-hal/src/interrupt/riscv.rs#L209 + // https://github.com/esp-rs/esp-hal/blob/esp-hal-v1.0.0-rc.0/esp-hal/src/interrupt/riscv.rs#L597 const EXTERNAL_INTERRUPTS: [u8; 12] = [20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]; #[allow(clippy::too_many_arguments)] |