diff options
| author | datdenkikniet <jcdra1@gmail.com> | 2025-03-22 23:55:32 +0100 |
|---|---|---|
| committer | datdenkikniet <38322042+datdenkikniet@users.noreply.github.com> | 2025-03-23 09:57:48 +0000 |
| commit | 11699b439126744ad918a1c6b90e73cb24da868d (patch) | |
| tree | 02421695d6cab568fb6010fce4369f918a8fe406 /rtic-monotonics/src/esp32c3.rs | |
| parent | 5de3ca0aef627f9d4d095e386c3b833d35477685 (diff) | |
rtic: placate clippy for esp32c3
Diffstat (limited to 'rtic-monotonics/src/esp32c3.rs')
| -rw-r--r-- | rtic-monotonics/src/esp32c3.rs | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/rtic-monotonics/src/esp32c3.rs b/rtic-monotonics/src/esp32c3.rs index 924df2c..51eac83 100644 --- a/rtic-monotonics/src/esp32c3.rs +++ b/rtic-monotonics/src/esp32c3.rs @@ -49,8 +49,8 @@ impl TimerBackend { /// Use the prelude macros instead. pub fn _start(timer: SYSTIMER) { const INTERRUPT_MAP_BASE: u32 = 0x600c2000; - let interrupt_number = 37 as isize; - let cpu_interrupt_number = 31 as isize; + let interrupt_number = 37isize; + let cpu_interrupt_number = 31isize; unsafe { let intr_map_base = INTERRUPT_MAP_BASE as *mut u32; intr_map_base @@ -65,7 +65,7 @@ impl TimerBackend { intr_prio_base .offset(cpu_interrupt_number) - .write_volatile(15 as u32); + .write_volatile(15); } timer.conf().write(|w| w.timer_unit0_work_en().set_bit()); timer |