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Diffstat (limited to 'examples/stm32g030f6_periodic_prints/.cargo/config.toml')
| -rw-r--r-- | examples/stm32g030f6_periodic_prints/.cargo/config.toml | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/examples/stm32g030f6_periodic_prints/.cargo/config.toml b/examples/stm32g030f6_periodic_prints/.cargo/config.toml new file mode 100644 index 0000000..15ddd2a --- /dev/null +++ b/examples/stm32g030f6_periodic_prints/.cargo/config.toml @@ -0,0 +1,24 @@ +[target.'cfg(all(target_arch = "arm", target_os = "none"))'] +# TODO(2) replace `$CHIP` with your chip's name (see `probe-run --list-chips` output) +runner = "probe-run --chip STM32G030F6Px" +rustflags = [ + "-C", "linker=flip-link", + "-C", "link-arg=-Tlink.x", + "-C", "link-arg=-Tdefmt.x", + # This is needed if your flash or ram addresses are not aligned to 0x10000 in memory.x + # See https://github.com/rust-embedded/cortex-m-quickstart/pull/95 + "-C", "link-arg=--nmagic", +] + +[build] +# TODO(3) Adjust the compilation target. +# (`thumbv6m-*` is compatible with all ARM Cortex-M chips but using the right +# target improves performance) +target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+ +# target = "thumbv7m-none-eabi" # Cortex-M3 +# target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU) +# target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) + +[alias] +rb = "run --bin" +rrb = "run --release --bin" |