diff options
Diffstat (limited to 'rtic-macros')
| -rw-r--r-- | rtic-macros/CHANGELOG.md | 4 | ||||
| -rw-r--r-- | rtic-macros/src/codegen/bindings/esp32c3.rs | 12 |
2 files changed, 12 insertions, 4 deletions
diff --git a/rtic-macros/CHANGELOG.md b/rtic-macros/CHANGELOG.md index 5a69d42..dd9dcea 100644 --- a/rtic-macros/CHANGELOG.md +++ b/rtic-macros/CHANGELOG.md @@ -14,6 +14,10 @@ For each category, *Added*, *Changed*, *Fixed* add new entries at the top! - Fix codegen emitting unqualified `Result` - Improve error output for prios > dispatchers +### Fixed + +- Fix interrupt handlers when targeting esp32c3 and using latest version of esp-hal + ## [v2.1.0] - 2024-02-27 ### Added diff --git a/rtic-macros/src/codegen/bindings/esp32c3.rs b/rtic-macros/src/codegen/bindings/esp32c3.rs index 254b0f5..4caaa35 100644 --- a/rtic-macros/src/codegen/bindings/esp32c3.rs +++ b/rtic-macros/src/codegen/bindings/esp32c3.rs @@ -80,11 +80,13 @@ mod esp32c3 { } stmts } + pub fn pre_init_enable_interrupts(app: &App, analysis: &CodegenAnalysis) -> Vec<TokenStream2> { let mut stmts = vec![]; - let mut curr_cpu_id: u8 = 1; //cpu interrupt id 0 is reserved + let mut curr_cpu_id: u8 = 16; // cpu interrupt ids 0-15 are reserved let rt_err = util::rt_err_ident(); let max_prio: usize = 15; //unfortunately this is not part of pac, but we know that max prio is 15. + let min_prio: usize = 1; let interrupt_ids = analysis.interrupts.iter().map(|(p, (id, _))| (p, id)); // Unmask interrupts and set their priorities for (&priority, name) in interrupt_ids.chain( @@ -95,9 +97,11 @@ mod esp32c3 { let es = format!( "Maximum priority used by interrupt vector '{name}' is more than supported by hardware" ); + let es_zero = format!("Priority {priority} used by interrupt vector '{name}' is less than supported by hardware"); // Compile time assert that this priority is supported by the device stmts.push(quote!( const _: () = if (#max_prio) <= #priority as usize { ::core::panic!(#es); }; + const _: () = if (#min_prio) > #priority as usize { ::core::panic!(#es_zero);}; )); stmts.push(quote!( rtic::export::enable( @@ -218,14 +222,14 @@ mod esp32c3 { static RTIC_ASYNC_MAX_LOGICAL_PRIO: u8 = #max; )] } + pub fn handler_config( app: &App, analysis: &CodegenAnalysis, dispatcher_name: Ident, ) -> Vec<TokenStream2> { let mut stmts = vec![]; - let mut curr_cpu_id = 1; - //let mut ret = ""; + let mut curr_cpu_id = 16; // cpu interrupt ids 0-15 are reserved let interrupt_ids = analysis.interrupts.iter().map(|(p, (id, _))| (p, id)); for (_, name) in interrupt_ids.chain( app.hardware_tasks @@ -233,7 +237,7 @@ mod esp32c3 { .filter_map(|task| Some((&task.args.priority, &task.args.binds))), ) { if *name == dispatcher_name { - let ret = &("cpu_int_".to_owned() + &curr_cpu_id.to_string() + "_handler"); + let ret = &("interrupt".to_owned() + &curr_cpu_id.to_string()); stmts.push(quote!(#[export_name = #ret])); } curr_cpu_id += 1; |