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path: root/src/export.rs
AgeCommit message (Collapse)Author
2023-03-01Fix locks, basepri writeback errorEmil Fresk
2023-03-01export Cell removed, expmples updatedPer Lindgren
2023-03-01Removed Priority, simplified lifetime handlingEmil Fresk
2023-03-01More removalEmil Fresk
2023-03-01Even more cleanupEmil Fresk
2023-03-01Old xtask test passEmil Fresk
2022-07-27Remove use of basepri register on thumbv8m.baseDavid Watson
The basepri register appears to be aviable on thumbv8m.main but not thumbv8m.base. At the very least, attempting to compile against a Cortex-M23 based Microchip ATSAML10E16A generates an error: ``` error[E0432]: unresolved import `cortex_m::register::basepri` --> /Users/dwatson/.cargo/registry/src/github.com-1ecc6299db9ec823/cortex-m-rtic-1.1.3/src/export.rs:25:5 | 25 | use cortex_m::register::basepri; | ^^^^^^^^^^^^^^^^^^^^^^^^^^^ no `basepri` in `register` ``` This is an attempt to account for the fact that thumbv8m.base (M23) MCUs don't have the BASEPRI register but have more than 32 interrupts. This moves away from the architecture specific config flags and switches to a more functional flag. Make the mask size depend on the max interrupt id Rather than assuming a fixed interrupt count of 32 this code uses an array of u32 bitmasks to calculate the priority mask. The size of this array is calculated at compile time based on the size of the largest interrupt id being used in the target code. For thumbv6m this should be equivalent to the previous version that used a single u32 mask. For thumbv8m.base it will be larger depending on the interrupts used. Don't write 0s to the ISER and ICER registers Writing 0s to these registers is a no-op. Since these masks should be calculated at compile time, this conditional should result in writes being optimized out of the code. Prevent panic on non-arm targets Panicking on unknown targets was breaking things like the doc build on linux. This change should only panic when building on unknown arm targets.
2022-06-07fix ci: use SYST::PTRJorge Aparicio
SYST::ptr has been deprecated in cortex-m v0.7.5 SYST::PTR is available since cortex-m v0.7.0
2022-05-24Fix clash with defmtEmil Fresk
2022-04-20Added check for resource usage and to generate an compile error for thumbv6 ↵Emil Fresk
exceptions
2022-04-20Masks take 3Emil Fresk
2022-03-02Added support for SRP based scheduling for armv6mPer Lindgren
2022-02-22Clippy with pedantic suggestionsHenrik Tjäder
2021-12-14Idle: Switch to NOP instead of WFIHenrik Tjäder
Add example how to get old WFI behaviour
2021-09-28Fix export of SYSTEmil Fresk
2021-09-14Cleanup export and actually use rtic::export, made fn init inlineEmil Fresk
2021-08-16Remove linked list impl - use heapless, linked list init now const fnEmil Fresk
2021-07-09const genericsAndrey Zgarbul
2021-02-18Now with new monotonic trait and crateEmil Fresk
2020-12-12Monotonic codegen now passing compile stageEmil Fresk
2020-12-10More workEmil Fresk
2020-12-08TQ handlers being generatedEmil Fresk
2020-12-03Save, init generation fixedEmil Fresk
2020-10-15Implement all clippy suggestionsHenrik Tjäder
2020-10-01Remove exports related to heterogeneous multi-core supportHenrik Tjäder
2020-10-01Added `bare_metal::CriticalSection` to `init::Context`Emil Fresk
2020-09-01Remove stale code, fix comment stylingHenrik Tjäder
2020-09-01Brutally yank out multicoreHenrik Tjäder
2020-06-11Rename RTFM to RTICHenrik Tjäder
2019-09-15don't use deprecated APIJorge Aparicio
2019-06-24Monotonic trait is safe; add MultiCore traitJorge Aparicio
2019-06-13rtfm-syntax refactor + heterogeneous multi-core supportJorge Aparicio
2019-05-21bump heapless dependency to v0.5.0; remove "nightly" featureJorge Aparicio
with the upcoming version of heapless we are able to initialize all internal queues in const context removing the need for late initialization this commit also removes the "nightly" feature because all the optimization provided by it are now enabled by default
2019-05-21removes the maybe_uninit feature gateJorge Aparicio
and stop newtyping `core::mem::MaybeUninit`
2019-05-01implement RFCs 147 and 155, etc.Jorge Aparicio
This commit: - Implements RFC 147: "all functions must be safe" - Implements RFC 155: "explicit Context parameter" - Implements the pending breaking change #141: reject assign syntax in `init` (which was used to initialize late resources) - Refactors code generation to make it more readable -- there are no more random identifiers in the output -- and align it with the book description of RTFM internals. - Makes the framework hard depend on `core::mem::MaybeUninit` and thus will require nightly until that API is stabilized. - Fixes a ceiling analysis bug where the priority of the system timer was not considered in the analysis. - Shrinks the size of all the internal queues by turning `AtomicUsize` indices into `AtomicU8`s. - Removes the integration with `owned_singleton`.
2019-04-16more nightly fixesJorge Aparicio
2019-04-16[NFC] fix nightly ciJorge Aparicio
2019-02-19turn all potential UB into panicsJorge Aparicio
2019-02-19add "nightly" featureJorge Aparicio
2019-02-16cargo fmtJorge Aparicio
2019-02-16make debug builds reproducibleJorge Aparicio
2018-12-16properly handle #[cfg] (conditional compilation) on resourcesJorge Aparicio
2018-12-16use the single core variant of spsc::QueueJorge Aparicio
2018-11-04impl Mutex on all shared resourcesJorge Aparicio
document how to write generic code that operates on resources
2018-11-03v0.4.0Jorge Aparicio
closes #32 closes #33
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-27 13:56:27 +0000