aboutsummaryrefslogtreecommitdiff
path: root/xtask/src/run.rs
AgeCommit message (Collapse)Author
2025-07-02xtask: size: Store the expected output same as runHenrik Tjäder
2025-06-15xtask: Add --loom argument to testHenrik Tjäder
For now filter to only rtic-sync in ci subcommand
2025-06-15xtask: run: Use common BuildModeHenrik Tjäder
2025-06-15xtask: cargo_format: grab check_only from structHenrik Tjäder
2025-06-15xtask: Move info prints into runHenrik Tjäder
2024-04-10Monotonic rewrite (#874)Finomnis
* Rework timer_queue and monotonic architecture Goals: * make Monotonic purely internal * make Monotonic purely tick passed, no fugit involved * create a wrapper struct in the user's code via a macro that then converts the "now" from the tick based monotonic to a fugit based timestamp We need to proxy the delay functions of the timer queue anyway, so we could simply perform the conversion in those proxy functions. * Update cargo.lock * Update readme of rtic-time * CI: ESP32: Redact esp_image: Too volatile * Fixup: Changelog double entry rebase mistake --------- Co-authored-by: Henrik Tjäder <henrik@tjaders.com>
2024-03-20RISC-V support over CLINT (#815)Román Cárdenas Rodríguez
* Rebase to master * using interrupt_mod * bug fixes * fix other backends * Add changelog * forgot about rtic-macros * backend-specific configuration * core peripherals optional over macro argument * pre_init_preprocessing binding * CI for RISC-V (WIP) * separation of concerns * add targets for RISC-V examples * remove qemu feature * prepare examples folder * move examples all together * move ci out of examples * minor changes * add cortex-m * new xtask: proof of concept * fix build.yml * feature typo * clean rtic examples * reproduce weird issue * remove unsafe code in user app * update dependencies * allow builds on riscv32imc * let's fix QEMU * Update .github/workflows/build.yml Co-authored-by: Henrik Tjäder <henrik@tjaders.com> * New build.rs * removing test features * adapt ui test to new version of clippy * add more examples to RISC-V backend * proper configuration of heapless for riscv32imc * opt-out examples for riscv32imc * point to new version of riscv-slic * adapt new macro bindings * adapt examples and CI to stable * fix cortex-m CI * Review --------- Co-authored-by: Henrik Tjäder <henrik@tjaders.com>
2023-04-16Also allow denying for QEMU, and fix the link-arg problem caused bydatdenkikniet
overriding RUSTFLAGS
2023-04-16Tests should always deny warningsdatdenkikniet
2023-04-16Actually chain thesedatdenkikniet
2023-04-16Rename + better printoutdatdenkikniet
2023-04-16Move run into a subdirectory and split `iter` stuff into a moduledatdenkikniet
2023-04-16Move all run-related stuff into `run`datdenkikniet
2023-04-16Rename cargo_commands -> rundatdenkikniet
Rename command -> cargo_command