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#![no_std]
#![feature(rustc_private)]
extern crate fusible;
pub mod ksz8081;
pub trait Mdio {
type Error: core::error::Error;
fn read(&mut self, ctrl: u16) -> Result<u16, Self::Error>;
fn write(&mut self, ctrl: u16, data: u16) -> Result<(), Self::Error>;
}
pub trait Miim {
type Error: core::error::Error;
fn read(&mut self, phy: u8, reg: u8) -> Result<u16, Self::Error>;
fn write(&mut self, phy: u8, reg: u8, data: u16) -> Result<(), Self::Error>;
}
impl<T> Miim for T
where
T: Mdio,
{
type Error = <T as Mdio>::Error;
fn read(&mut self, phy: u8, reg: u8) -> Result<u16, Self::Error> {
Mdio::read(self, read_ctrl_bits(phy, reg))
}
fn write(&mut self, phy: u8, reg: u8, data: u16) -> Result<(), Self::Error> {
Mdio::write(self, write_ctrl_bits(phy, reg), data)
}
}
const fn phy_addr_ctrl_bits(phy_addr: u8) -> u16 {
const PHY_ADDR_OFFSET: u16 = 7;
((phy_addr & 0b00011111) as u16) << PHY_ADDR_OFFSET
}
const fn reg_addr_ctrl_bits(reg_addr: u8) -> u16 {
const REG_ADDR_OFFSET: u16 = 2;
((reg_addr & 0b00011111) as u16) << REG_ADDR_OFFSET
}
pub const fn read_ctrl_bits(phy_addr: u8, reg_addr: u8) -> u16 {
const READ_CTRL_BITS: u16 = 0b0110_00000_00000_00;
READ_CTRL_BITS | phy_addr_ctrl_bits(phy_addr) | reg_addr_ctrl_bits(reg_addr)
}
pub const fn write_ctrl_bits(phy_addr: u8, reg_addr: u8) -> u16 {
const WRITE_CTRL_BITS: u16 = 0b0101_00000_00000_10;
WRITE_CTRL_BITS | phy_addr_ctrl_bits(phy_addr) | reg_addr_ctrl_bits(reg_addr)
}
pub trait Phy<M: Miim> {
type Error: core::error::Error;
fn initialize(&mut self, miim: &mut M) -> Result<(), Self::Error>;
}
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