diff options
| author | William D. Jones <thor0505@comcast.net> | 2019-08-04 09:32:34 -0400 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2019-08-04 13:32:34 +0000 |
| commit | 9b532bef934020cdf25dbcd9eee8bd5b973a8186 (patch) | |
| tree | 1efcc7d9e01db554bdc8ea8ed8eb0f08b8be948e | |
| parent | e701859a274430b88c17e77e3956fa1e435af5a7 (diff) | |
Make oe in SRAMResource optional.
| -rw-r--r-- | nmigen_boards/dev/sram.py | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/nmigen_boards/dev/sram.py b/nmigen_boards/dev/sram.py index 4eb4eca..14e31ce 100644 --- a/nmigen_boards/dev/sram.py +++ b/nmigen_boards/dev/sram.py @@ -4,10 +4,12 @@ from nmigen.build import * __all__ = ["SRAMResource"] -def SRAMResource(*args, cs, oe, we, a, d, dm=None, attrs=None): +def SRAMResource(*args, cs, oe=None, we, a, d, dm=None, attrs=None): io = [] io.append(Subsignal("cs", PinsN(cs, dir="o", assert_width=1))) - io.append(Subsignal("oe", PinsN(oe, dir="o", assert_width=1))) + if oe is not None: + # Asserted WE# deactivates the D output buffers, so WE# can be used to replace OE#. + io.append(Subsignal("oe", PinsN(oe, dir="o", assert_width=1))) io.append(Subsignal("we", PinsN(we, dir="o", assert_width=1))) io.append(Subsignal("a", Pins(a, dir="o"))) io.append(Subsignal("d", Pins(d, dir="io"))) |