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authorwhitequark <whitequark@whitequark.org>2019-08-04 11:08:45 +0000
committerwhitequark <whitequark@whitequark.org>2019-08-04 11:08:45 +0000
commit0ddf31787e2242b3040a775cf7d5f9113e669b16 (patch)
tree62052556ac1ab66ee520b86141173a20b602008b /nmigen_boards/blackice.py
parent209f84e253bfff63f21c07a921b060dc67361629 (diff)
[breaking-change] Factor out "sram" resource.
Fixes #9.
Diffstat (limited to 'nmigen_boards/blackice.py')
-rw-r--r--nmigen_boards/blackice.py18
1 files changed, 5 insertions, 13 deletions
diff --git a/nmigen_boards/blackice.py b/nmigen_boards/blackice.py
index aa84d5e..51d09e4 100644
--- a/nmigen_boards/blackice.py
+++ b/nmigen_boards/blackice.py
@@ -41,19 +41,11 @@ class BlackIcePlatform(LatticeICE40Platform):
attrs=Attrs(IO_STANDARD="SB_LVCMOS33", PULLUP="1")
),
- Resource("sram", 0,
- Subsignal("address", Pins(
- "137 138 139 141 142 42 43 44 73 74 75 76 115 116 117 118 119 78",
- dir="o"
- )),
- Subsignal("data", Pins(
- "135 134 130 128 125 124 122 121 61 60 56 55 52 49 48 47",
- dir="io"
- )),
- Subsignal("oe", PinsN("45", dir="o")),
- Subsignal("we", PinsN("120", dir="o")),
- Subsignal("cs", PinsN("136", dir="o")),
- Attrs(IO_STANDARD="SB_LVCMOS33"),
+ SRAMResource(0,
+ cs="136", oe="45", we="120",
+ a="137 138 139 141 142 42 43 44 73 74 75 76 115 116 117 118 119 78",
+ d="135 134 130 128 125 124 122 121 61 60 56 55 52 49 48 47",
+ attrs=Attrs(IO_STANDARD="SB_LVCMOS33"),
),
]
connectors = [