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| author | S.J.R. van Schaik <stephan@synkhronix.com> | 2021-05-31 04:51:32 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-05-31 08:51:32 +0000 |
| commit | 08b1b955b1fba1f776ff233a23eb98526a8d0c39 (patch) | |
| tree | 34510113a8c59794c1da21bf9ea5346d76cef436 /nmigen_boards/genesys2.py | |
| parent | e8611d433df8c2e4a0206c1d80faa2a831ca8da0 (diff) | |
[breaking-change] Factor out VGAResource.
Diffstat (limited to 'nmigen_boards/genesys2.py')
| -rw-r--r-- | nmigen_boards/genesys2.py | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/nmigen_boards/genesys2.py b/nmigen_boards/genesys2.py index bf8e98f..0a2aef7 100644 --- a/nmigen_boards/genesys2.py +++ b/nmigen_boards/genesys2.py @@ -127,14 +127,12 @@ class Genesys2Platform(Xilinx7SeriesPlatform): DiffPairs(p="AJ26 AG27 AH26", n="AK26 AG28 AH27", dir="i")), Attrs(IOSTANDARD="TMDS_33")), - Resource("vga", 0, - Subsignal("r", Pins("AK25 AG25 AH25 AK24 AJ24", dir="o")), - Subsignal("g", Pins("AJ23 AJ22 AH22 AK21 AJ21 AK23", - dir="o")), - Subsignal("b", Pins("AH20 AG20 AF21 AK20 AG22", dir="o")), - Subsignal("hsync", PinsN("AF20", dir="o")), - Subsignal("vsync", PinsN("AG23", dir="o")), - Attrs(IOSTANDARD="LVCMOS33")), + VGAResource(0, + r="AK25 AG25 AH25 AK24 AJ24", + g="AJ23 AJ22 AH22 AK21 AJ21 AK23", + b="AH20 AG20 AF21 AK20 AG22", + hs="AF20", vs="AG23", invert_sync=True, + attrs=Attrs(IOSTANDARD="LVCMOS33")), *SDCardResources(0, clk="R28", cmd="R29", dat0="R26", dat1="R30", dat2="P29", dat3="T30", cd="P28", attrs=Attrs(IOSTANDARD="LVCMOS33")), |