diff options
| author | GuzTech <GuzTech@users.noreply.github.com> | 2020-11-26 15:50:00 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-11-26 14:50:00 +0000 |
| commit | b40c3d6cb20081ff8941fc4addef92170ffb01a9 (patch) | |
| tree | 77ec275eeedadcce9a0b621cb4ae5c8db32211a3 /nmigen_boards/ulx3s.py | |
| parent | b90a89da7c3878ee10db3cb2d10f13aa2bbb85c3 (diff) | |
[breaking-change] Add `_n` suffix to argument names of pins with fixed inverters.
Note: this change does NOT affect pin functionality or naming, and
does not require modifying your design. It does however affect some
board files, where keywords corresponding to active low pins will have
to be adjusted:
SPIResource(0, cs="C1", ...) → SPIResource(0, cs_n="C1", ...)
The new naming scheme will make it easier to write and audit board
files by clearly marking inverted pins in resource factories, similarly to
how `PinsN` indicates the same in bare resources.
Fixes #129.
Diffstat (limited to 'nmigen_boards/ulx3s.py')
| -rw-r--r-- | nmigen_boards/ulx3s.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/nmigen_boards/ulx3s.py b/nmigen_boards/ulx3s.py index 5f9c924..1970106 100644 --- a/nmigen_boards/ulx3s.py +++ b/nmigen_boards/ulx3s.py @@ -66,14 +66,14 @@ class _ULX3SPlatform(LatticeECP5Platform): ), SDRAMResource(0, - clk="F19", cke="F20", cs="P20", we="T20", cas="T19", ras="R20", dqm="U19 E20", + clk="F19", cke="F20", cs_n="P20", we_n="T20", cas_n="T19", ras_n="R20", dqm="U19 E20", ba="P19 N20", a="M20 M19 L20 L19 K20 K19 K18 J20 J19 H20 N19 G20 G19", dq="J16 L18 M18 N18 P18 T18 T17 U20 E19 D20 D19 C20 E18 F18 J18 J17", attrs=Attrs(PULLMODE="NONE", DRIVE="4", SLEWRATE="FAST", IO_TYPE="LVCMOS33") ), # SPI bus for ADC. - SPIResource("adc", cs="R17", copi="R16", cipo="U16", clk="P17", + SPIResource("adc", cs_n="R17", copi="R16", cipo="U16", clk="P17", attrs=Attrs(IO_TYPE="LVCMOS33", PULLMODE="UP")), # TRRS audio jack |