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-rw-r--r--nmigen_boards/icestick.py23
1 files changed, 10 insertions, 13 deletions
diff --git a/nmigen_boards/icestick.py b/nmigen_boards/icestick.py
index a80a3f9..b90573b 100644
--- a/nmigen_boards/icestick.py
+++ b/nmigen_boards/icestick.py
@@ -11,18 +11,15 @@ __all__ = ["ICEStickPlatform"]
class ICEStickPlatform(LatticeICE40Platform):
device = "iCE40HX1K"
package = "TQ144"
- clocks = [
- ("clk12", 12e6),
- ]
resources = [
Resource("clk12", 0, Pins("21", dir="i"),
- extras={"GLOBAL": "1", "IO_STANDARD": "SB_LVCMOS33"}),
+ Clock(12e6), Attrs(GLOBAL="1", IO_STANDARD="SB_LVCMOS33")),
- Resource("user_led", 0, Pins("99", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}),
- Resource("user_led", 1, Pins("98", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}),
- Resource("user_led", 2, Pins("97", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}),
- Resource("user_led", 3, Pins("96", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}),
- Resource("user_led", 4, Pins("95", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}),
+ Resource("user_led", 0, Pins("99", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),
+ Resource("user_led", 1, Pins("98", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),
+ Resource("user_led", 2, Pins("97", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),
+ Resource("user_led", 3, Pins("96", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),
+ Resource("user_led", 4, Pins("95", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),
Resource("serial", 0,
Subsignal("rx", Pins("9", dir="i")),
@@ -32,14 +29,14 @@ class ICEStickPlatform(LatticeICE40Platform):
Subsignal("dtr", Pins("3", dir="o")),
Subsignal("dsr", Pins("2", dir="i")),
Subsignal("dcd", Pins("1", dir="i")),
- extras={"IO_STANDARD": "SB_LVTTL", "PULLUP": "1"}
+ Attrs(IO_STANDARD="SB_LVTTL", PULLUP="1")
),
Resource("irda", 0,
Subsignal("rx", Pins("106", dir="i")),
Subsignal("tx", Pins("105", dir="o")),
Subsignal("sd", Pins("107", dir="o")),
- extras={"IO_STANDARD": "SB_LVCMOS33"}
+ Attrs(IO_STANDARD="SB_LVCMOS33")
),
Resource("spiflash", 0,
@@ -47,7 +44,7 @@ class ICEStickPlatform(LatticeICE40Platform):
Subsignal("clk", Pins("70", dir="o")),
Subsignal("mosi", Pins("67", dir="o")),
Subsignal("miso", Pins("68", dir="i")),
- extras={"IO_STANDARD": "SB_LVCMOS33"}
+ Attrs(IO_STANDARD="SB_LVCMOS33")
),
]
connectors = [
@@ -65,4 +62,4 @@ class ICEStickPlatform(LatticeICE40Platform):
if __name__ == "__main__":
from ._blinky import build_and_program
- build_and_program(ICEStickPlatform)
+ build_and_program(ICEStickPlatform, "clk12", 12e6)