aboutsummaryrefslogtreecommitdiff
path: root/nmigen_boards/genesys2.py
AgeCommit message (Collapse)Author
2020-11-05Factor out I2C resource.awygle
2020-10-09genesys2: convert `ulpi` to ULPIResourceKatherine Temkin
2020-10-09genesys2: correctly specify I/O attributes for VADJ banksKatherine Temkin
2020-07-16[breaking-change] Update SPI pin names.ECP5-PCIe
The new names follow the OSHWA convention described at: https://www.oshwa.org/a-resolution-to-redefine-spi-signal-names/
2020-05-28Add Digilent Genesys2 board.Alain Péteut