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path: root/nmigen_boards/genesys2.py
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2023-02-03Remove the deprecated `nmigen_boards` namespace.Catherine
2021-12-10Rename nMigen to Amaranth HDL.whitequark
2021-05-31[breaking-change] Factor out VGAResource.S.J.R. van Schaik
2020-11-26[breaking-change] Add `_n` suffix to argument names of pins with fixed ↵GuzTech
inverters. Note: this change does NOT affect pin functionality or naming, and does not require modifying your design. It does however affect some board files, where keywords corresponding to active low pins will have to be adjusted: SPIResource(0, cs="C1", ...) → SPIResource(0, cs_n="C1", ...) The new naming scheme will make it easier to write and audit board files by clearly marking inverted pins in resource factories, similarly to how `PinsN` indicates the same in bare resources. Fixes #129.
2020-11-05Factor out I2C resource.awygle
2020-10-09genesys2: convert `ulpi` to ULPIResourceKatherine Temkin
2020-10-09genesys2: correctly specify I/O attributes for VADJ banksKatherine Temkin
2020-07-16[breaking-change] Update SPI pin names.ECP5-PCIe
The new names follow the OSHWA convention described at: https://www.oshwa.org/a-resolution-to-redefine-spi-signal-names/
2020-05-28Add Digilent Genesys2 board.Alain Péteut