diff options
| author | Ian McIntyre <me@mciantyre.dev> | 2025-11-30 18:52:34 -0500 |
|---|---|---|
| committer | Ian McIntyre <me@mciantyre.dev> | 2025-11-30 19:10:51 -0500 |
| commit | 76199f21616ad86cf68f3b063c1ce23c6fc5a52f (patch) | |
| tree | 4c076d0afd649803a2bd9a5ed5cbb1f1c74fb459 /drivers/ccm-11xx/src/ral_11xx/osc_pll.rs | |
First commit
Diffstat (limited to 'drivers/ccm-11xx/src/ral_11xx/osc_pll.rs')
| -rw-r--r-- | drivers/ccm-11xx/src/ral_11xx/osc_pll.rs | 173 |
1 files changed, 173 insertions, 0 deletions
diff --git a/drivers/ccm-11xx/src/ral_11xx/osc_pll.rs b/drivers/ccm-11xx/src/ral_11xx/osc_pll.rs new file mode 100644 index 0000000..c4f10ba --- /dev/null +++ b/drivers/ccm-11xx/src/ral_11xx/osc_pll.rs @@ -0,0 +1,173 @@ +#[repr(C)] +#[allow(non_snake_case)] +pub struct RegisterBlock { + pub DIRECT: u32, + pub DOMAIN: u32, + pub SETPOINT: u32, + _reserved: [u8; 4], + pub STATUS0: u32, + pub STATUS1: u32, + pub CONFIG: u32, + pub AUTHEN: u32, +} + +ral_registers::register! { + #[doc = "Clock source direct control"] + pub DIRECT<u32> RW [ + #[doc = "turn on clock source"] + ON start(0) width(1) RW {} + ] +} + +ral_registers::register! { + #[doc = "Clock source domain control"] + pub DOMAIN<u32> RW [ + #[doc = "Current dependence level"] + LEVEL start(0) width(3) RW {} + #[doc = "Dependence level"] + LEVEL0 start(16) width(3) RW {} + #[doc = "Depend level"] + LEVEL1 start(20) width(3) RW {} + #[doc = "Depend level"] + LEVEL2 start(24) width(3) RW {} + #[doc = "Depend level"] + LEVEL3 start(28) width(3) RW {} + ] +} + +ral_registers::register! { + #[doc = "Clock source Setpoint setting"] + pub SETPOINT<u32> RW [ + #[doc = "Setpoint"] + SETPOINT start(0) width(16) RW {} + #[doc = "Standby"] + STANDBY start(16) width(16) RW {} + ] +} + +ral_registers::register! { + #[doc = "Clock source working status"] + pub STATUS0<u32> RO [ + #[doc = "Clock source current state"] + ON start(0) width(1) RO {} + #[doc = "Clock source active"] + STATUS_EARLY start(4) width(1) RO {} + #[doc = "Clock source ready"] + STATUS_LATE start(5) width(1) RO {} + #[doc = "Domains that own this clock source"] + ACTIVE_DOMAIN start(8) width(4) RO {} + #[doc = "Enable status from each domain"] + DOMAIN_ENABLE start(12) width(4) RO {} + #[doc = "In use"] + IN_USE start(28) width(1) RO {} + ] +} + +ral_registers::register! { + #[doc = "Clock source low power status"] + pub STATUS1<u32> RO [ + #[doc = "Domain0 Low Power Mode"] + CPU0_MODE start(0) width(2) RO { + #[doc = "Run"] + RUN = 0, + #[doc = "Wait"] + WAIT = 0x1, + #[doc = "Stop"] + STOP = 0x2, + #[doc = "Suspend"] + SUSPEND = 0x3, + } + #[doc = "Domain0 request enter Low Power Mode"] + CPU0_MODE_REQUEST start(2) width(1) RO {} + #[doc = "Domain0 Low Power Mode task done"] + CPU0_MODE_DONE start(3) width(1) RO {} + #[doc = "Domain1 Low Power Mode"] + CPU1_MODE start(4) width(2) RO { + #[doc = "Run"] + RUN = 0, + #[doc = "Wait"] + WAIT = 0x1, + #[doc = "Stop"] + STOP = 0x2, + #[doc = "Suspend"] + SUSPEND = 0x3, + } + #[doc = "Domain1 request enter Low Power Mode"] + CPU1_MODE_REQUEST start(6) width(1) RO {} + #[doc = "Domain1 Low Power Mode task done"] + CPU1_MODE_DONE start(7) width(1) RO {} + #[doc = "Domain2 Low Power Mode"] + CPU2_MODE start(8) width(2) RO { + #[doc = "Run"] + RUN = 0, + #[doc = "Wait"] + WAIT = 0x1, + #[doc = "Stop"] + STOP = 0x2, + #[doc = "Suspend"] + SUSPEND = 0x3, + } + #[doc = "Domain2 request enter Low Power Mode"] + CPU2_MODE_REQUEST start(10) width(1) RO {} + #[doc = "Domain2 Low Power Mode task done"] + CPU2_MODE_DONE start(11) width(1) RO {} + #[doc = "Domain3 Low Power Mode"] + CPU3_MODE start(12) width(2) RO { + #[doc = "Run"] + RUN = 0, + #[doc = "Wait"] + WAIT = 0x1, + #[doc = "Stop"] + STOP = 0x2, + #[doc = "Suspend"] + SUSPEND = 0x3, + } + #[doc = "Domain3 request enter Low Power Mode"] + CPU3_MODE_REQUEST start(14) width(1) RO {} + #[doc = "Domain3 Low Power Mode task done"] + CPU3_MODE_DONE start(15) width(1) RO {} + #[doc = "Next Setpoint to change to"] + TARGET_SETPOINT start(16) width(4) RO {} + #[doc = "Current Setpoint"] + CURRENT_SETPOINT start(20) width(4) RO {} + #[doc = "Clock gate turn off request from GPC Setpoint"] + SETPOINT_OFF_REQUEST start(24) width(1) RO {} + #[doc = "Clock source turn off finish from GPC Setpoint"] + SETPOINT_OFF_DONE start(25) width(1) RO {} + #[doc = "Clock gate turn on request from GPC Setpoint"] + SETPOINT_ON_REQUEST start(26) width(1) RO {} + #[doc = "Clock gate turn on finish from GPC Setpoint"] + SETPOINT_ON_DONE start(27) width(1) RO {} + #[doc = "Clock gate turn off request from GPC standby"] + STANDBY_IN_REQUEST start(28) width(1) RO {} + #[doc = "Clock source turn off finish from GPC standby"] + STANDBY_IN_DONE start(29) width(1) RO {} + #[doc = "Clock gate turn on finish from GPC standby"] + STANDBY_OUT_DONE start(30) width(1) RO {} + #[doc = "Clock gate turn on request from GPC standby"] + STANDBY_OUT_REQUEST start(31) width(1) RO {} + ] +} + +ral_registers::register! { + #[doc = "Clock source configuration"] + pub CONFIG<u32> RO [ + #[doc = "Automode Present"] + AUTOMODE_PRESENT start(1) width(1) RO {} + #[doc = "Setpoint present"] + SETPOINT_PRESENT start(4) width(1) RO {} + ] +} + +#[allow(non_snake_case)] +pub mod AUTHEN { + pub use super::super::clock_root::AUTHEN::*; + #[allow(non_upper_case_globals)] + pub mod CPULPM { + pub const access: ral_registers::Access = ral_registers::Access::RW; + pub const offset: u32 = 18; + pub const mask: u32 = 1 << 18; + #[doc(hidden)] + pub mod vals {} + } +} |
