diff options
Diffstat (limited to 'chips/imxrt1010/src/iomuxc.rs')
| -rw-r--r-- | chips/imxrt1010/src/iomuxc.rs | 100 |
1 files changed, 100 insertions, 0 deletions
diff --git a/chips/imxrt1010/src/iomuxc.rs b/chips/imxrt1010/src/iomuxc.rs new file mode 100644 index 0000000..7745808 --- /dev/null +++ b/chips/imxrt1010/src/iomuxc.rs @@ -0,0 +1,100 @@ +pub type RegisterBlock = imxrt_drivers_iomuxc_10xx::iomuxc::RegisterBlock<16, 44, 45>; + +pub use imxrt_drivers_iomuxc_10xx::iomuxc::{SELECT_INPUT, SW_MUX_CTL_PAD, SW_PAD_CTL_PAD}; + +/// Indices for `sw_[pad|mux]_ctl_pad` registers. +pub mod pad { + pub const GPIO_AD_14: usize = 0; + pub const GPIO_AD_13: usize = 1; + pub const GPIO_AD_12: usize = 2; + pub const GPIO_AD_11: usize = 3; + pub const GPIO_AD_10: usize = 4; + pub const GPIO_AD_09: usize = 5; + pub const GPIO_AD_08: usize = 6; + pub const GPIO_AD_07: usize = 7; + pub const GPIO_AD_06: usize = 8; + pub const GPIO_AD_05: usize = 9; + pub const GPIO_AD_04: usize = 10; + pub const GPIO_AD_03: usize = 11; + pub const GPIO_AD_02: usize = 12; + pub const GPIO_AD_01: usize = 13; + pub const GPIO_AD_00: usize = 14; + pub const GPIO_SD_14: usize = 15; + pub const GPIO_SD_13: usize = 16; + pub const GPIO_SD_12: usize = 17; + pub const GPIO_SD_11: usize = 18; + pub const GPIO_SD_10: usize = 19; + pub const GPIO_SD_09: usize = 20; + pub const GPIO_SD_08: usize = 21; + pub const GPIO_SD_07: usize = 22; + pub const GPIO_SD_06: usize = 23; + pub const GPIO_SD_05: usize = 24; + pub const GPIO_SD_04: usize = 25; + pub const GPIO_SD_03: usize = 26; + pub const GPIO_SD_02: usize = 27; + pub const GPIO_SD_01: usize = 28; + pub const GPIO_SD_00: usize = 29; + pub const GPIO_13: usize = 30; + pub const GPIO_12: usize = 31; + pub const GPIO_11: usize = 32; + pub const GPIO_10: usize = 33; + pub const GPIO_09: usize = 34; + pub const GPIO_08: usize = 35; + pub const GPIO_07: usize = 36; + pub const GPIO_06: usize = 37; + pub const GPIO_05: usize = 38; + pub const GPIO_04: usize = 39; + pub const GPIO_03: usize = 40; + pub const GPIO_02: usize = 41; + pub const GPIO_01: usize = 42; + pub const GPIO_00: usize = 43; +} + +/// Indices for `select_input` registers. +pub mod select_input { + pub const USB_OTG_ID: usize = 0; + pub const FLEXPWM1_PWMA_0: usize = 1; + pub const FLEXPWM1_PWMA_1: usize = 2; + pub const FLEXPWM1_PWMA_2: usize = 3; + pub const FLEXPWM1_PWMA_3: usize = 4; + pub const FLEXPWM1_PWMB_0: usize = 5; + pub const FLEXPWM1_PWMB_1: usize = 6; + pub const FLEXPWM1_PWMB_2: usize = 7; + pub const FLEXPWM1_PWMB_3: usize = 8; + pub const FLEXSPI_DQS_FA: usize = 9; + pub const FLEXSPI_DQS_FB: usize = 10; + pub const KPP_COL_0: usize = 11; + pub const KPP_COL_1: usize = 12; + pub const KPP_COL_2: usize = 13; + pub const KPP_COL_3: usize = 14; + pub const KPP_ROW_0: usize = 15; + pub const KPP_ROW_1: usize = 16; + pub const KPP_ROW_2: usize = 17; + pub const KPP_ROW_3: usize = 18; + pub const LPI2C1_HREQ: usize = 19; + pub const LPI2C1_SCL: usize = 20; + pub const LPI2C1_SDA: usize = 21; + pub const LPI2C2_SCL: usize = 22; + pub const LPI2C2_SDA: usize = 23; + pub const LPSPI1_PCS: usize = 24; + pub const LPSPI1_SCK: usize = 25; + pub const LPSPI1_SDI: usize = 26; + pub const LPSPI1_SDO: usize = 27; + pub const LPSPI2_PCS: usize = 28; + pub const LPSPI2_SCK: usize = 29; + pub const LPSPI2_SDI: usize = 30; + pub const LPSPI2_SDO: usize = 31; + pub const LPUART1_RXD: usize = 32; + pub const LPUART1_TXD: usize = 33; + pub const LPUART2_RXD: usize = 34; + pub const LPUART2_TXD: usize = 35; + pub const LPUART3_RXD: usize = 36; + pub const LPUART3_TXD: usize = 37; + pub const LPUART4_RXD: usize = 38; + pub const LPUART4_TXD: usize = 39; + pub const NMI_GLUE_NMI: usize = 40; + pub const SPDIF_IN1: usize = 41; + pub const SPDIF_TX_CLK2: usize = 42; + pub const USB_OTG_OC: usize = 43; + pub const XEV_GLUE_RXEV: usize = 44; +} |
