aboutsummaryrefslogtreecommitdiff
path: root/chips/imxrt1010/src/rt.rs
diff options
context:
space:
mode:
Diffstat (limited to 'chips/imxrt1010/src/rt.rs')
-rw-r--r--chips/imxrt1010/src/rt.rs361
1 files changed, 361 insertions, 0 deletions
diff --git a/chips/imxrt1010/src/rt.rs b/chips/imxrt1010/src/rt.rs
new file mode 100644
index 0000000..2fdbec8
--- /dev/null
+++ b/chips/imxrt1010/src/rt.rs
@@ -0,0 +1,361 @@
+#![allow(non_camel_case_types)]
+
+#[derive(Copy, Clone, Debug, PartialEq, Eq)]
+pub enum Interrupt {
+ #[doc = "0 - DMA0"]
+ DMA0 = 0,
+ #[doc = "1 - DMA1"]
+ DMA1 = 1,
+ #[doc = "2 - DMA2"]
+ DMA2 = 2,
+ #[doc = "3 - DMA3"]
+ DMA3 = 3,
+ #[doc = "4 - DMA4"]
+ DMA4 = 4,
+ #[doc = "5 - DMA5"]
+ DMA5 = 5,
+ #[doc = "6 - DMA6"]
+ DMA6 = 6,
+ #[doc = "7 - DMA7"]
+ DMA7 = 7,
+ #[doc = "8 - DMA8"]
+ DMA8 = 8,
+ #[doc = "9 - DMA9"]
+ DMA9 = 9,
+ #[doc = "10 - DMA10"]
+ DMA10 = 10,
+ #[doc = "11 - DMA11"]
+ DMA11 = 11,
+ #[doc = "12 - DMA12"]
+ DMA12 = 12,
+ #[doc = "13 - DMA13"]
+ DMA13 = 13,
+ #[doc = "14 - DMA14"]
+ DMA14 = 14,
+ #[doc = "15 - DMA15"]
+ DMA15 = 15,
+ #[doc = "16 - DMA_ERROR"]
+ DMA_ERROR = 16,
+ #[doc = "20 - LPUART1"]
+ LPUART1 = 20,
+ #[doc = "21 - LPUART2"]
+ LPUART2 = 21,
+ #[doc = "22 - LPUART3"]
+ LPUART3 = 22,
+ #[doc = "23 - LPUART4"]
+ LPUART4 = 23,
+ #[doc = "24 - PIT"]
+ PIT = 24,
+ #[doc = "25 - USB_OTG1"]
+ USB_OTG1 = 25,
+ #[doc = "26 - FLEXSPI"]
+ FLEXSPI = 26,
+ #[doc = "27 - FLEXRAM"]
+ FLEXRAM = 27,
+ #[doc = "28 - LPI2C1"]
+ LPI2C1 = 28,
+ #[doc = "29 - LPI2C2"]
+ LPI2C2 = 29,
+ #[doc = "30 - GPT1"]
+ GPT1 = 30,
+ #[doc = "31 - GPT2"]
+ GPT2 = 31,
+ #[doc = "32 - LPSPI1"]
+ LPSPI1 = 32,
+ #[doc = "33 - LPSPI2"]
+ LPSPI2 = 33,
+ #[doc = "34 - PWM1_0"]
+ PWM1_0 = 34,
+ #[doc = "35 - PWM1_1"]
+ PWM1_1 = 35,
+ #[doc = "36 - PWM1_2"]
+ PWM1_2 = 36,
+ #[doc = "37 - PWM1_3"]
+ PWM1_3 = 37,
+ #[doc = "38 - PWM1_FAULT"]
+ PWM1_FAULT = 38,
+ #[doc = "39 - KPP"]
+ KPP = 39,
+ #[doc = "40 - SRC"]
+ SRC = 40,
+ #[doc = "41 - GPR (aka \"GPC\") interrupt request"]
+ GPR_IRQ = 41,
+ #[doc = "42 - CCM_1"]
+ CCM_1 = 42,
+ #[doc = "43 - CCM_2"]
+ CCM_2 = 43,
+ #[doc = "44 - EWM"]
+ EWM = 44,
+ #[doc = "45 - WDOG2"]
+ WDOG2 = 45,
+ #[doc = "46 - SNVS_HP_WRAPPER"]
+ SNVS_HP_WRAPPER = 46,
+ #[doc = "47 - SNVS_HP_WRAPPER_TZ"]
+ SNVS_HP_WRAPPER_TZ = 47,
+ #[doc = "48 - SNVS_LP_WRAPPER"]
+ SNVS_LP_WRAPPER = 48,
+ #[doc = "49 - CSU"]
+ CSU = 49,
+ #[doc = "50 - DCP"]
+ DCP = 50,
+ #[doc = "51 - DCP_VMI"]
+ DCP_VMI = 51,
+ #[doc = "53 - TRNG"]
+ TRNG = 53,
+ #[doc = "56 - SAI1"]
+ SAI1 = 56,
+ #[doc = "57 - RTWDOG"]
+ RTWDOG = 57,
+ #[doc = "58 - SAI3_RX"]
+ SAI3_RX = 58,
+ #[doc = "59 - SAI3_TX"]
+ SAI3_TX = 59,
+ #[doc = "60 - SPDIF"]
+ SPDIF = 60,
+ #[doc = "61 - PMU"]
+ PMU = 61,
+ #[doc = "62 - XBAR1_IRQ_0_1_2_3"]
+ XBAR1_IRQ_0_1_2_3 = 62,
+ #[doc = "63 - TEMP_LOW_HIGH"]
+ TEMP_LOW_HIGH = 63,
+ #[doc = "64 - TEMP_PANIC"]
+ TEMP_PANIC = 64,
+ #[doc = "65 - USB_PHY"]
+ USB_PHY = 65,
+ #[doc = "66 - GPC"]
+ GPC = 66,
+ #[doc = "67 - ADC1"]
+ ADC1 = 67,
+ #[doc = "68 - FLEXIO1"]
+ FLEXIO1 = 68,
+ #[doc = "69 - DCDC"]
+ DCDC = 69,
+ #[doc = "70 - GPIO1_COMBINED_0_15"]
+ GPIO1_COMBINED_0_15 = 70,
+ #[doc = "71 - GPIO1_COMBINED_16_31"]
+ GPIO1_COMBINED_16_31 = 71,
+ #[doc = "72 - GPIO2_COMBINED_0_15"]
+ GPIO2_COMBINED_0_15 = 72,
+ #[doc = "73 - GPIO5_COMBINED_0_15"]
+ GPIO5_COMBINED_0_15 = 73,
+ #[doc = "74 - WDOG1"]
+ WDOG1 = 74,
+ #[doc = "75 - ADC_ETC_IRQ0"]
+ ADC_ETC_IRQ0 = 75,
+ #[doc = "76 - ADC_ETC_IRQ1"]
+ ADC_ETC_IRQ1 = 76,
+ #[doc = "77 - ADC_ETC_IRQ2"]
+ ADC_ETC_IRQ2 = 77,
+ #[doc = "78 - ADC_ETC_IRQ3"]
+ ADC_ETC_IRQ3 = 78,
+ #[doc = "79 - ADC_ETC_ERROR_IRQ"]
+ ADC_ETC_ERROR_IRQ = 79,
+}
+pub type interrupt = Interrupt;
+unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
+ #[inline(always)]
+ fn number(self) -> u16 {
+ self as u16
+ }
+}
+
+mod _vectors {
+ unsafe extern "C" {
+ fn DMA0();
+ fn DMA1();
+ fn DMA2();
+ fn DMA3();
+ fn DMA4();
+ fn DMA5();
+ fn DMA6();
+ fn DMA7();
+ fn DMA8();
+ fn DMA9();
+ fn DMA10();
+ fn DMA11();
+ fn DMA12();
+ fn DMA13();
+ fn DMA14();
+ fn DMA15();
+ fn DMA_ERROR();
+ fn LPUART1();
+ fn LPUART2();
+ fn LPUART3();
+ fn LPUART4();
+ fn PIT();
+ fn USB_OTG1();
+ fn FLEXSPI();
+ fn FLEXRAM();
+ fn LPI2C1();
+ fn LPI2C2();
+ fn GPT1();
+ fn GPT2();
+ fn LPSPI1();
+ fn LPSPI2();
+ fn PWM1_0();
+ fn PWM1_1();
+ fn PWM1_2();
+ fn PWM1_3();
+ fn PWM1_FAULT();
+ fn KPP();
+ fn SRC();
+ fn GPR_IRQ();
+ fn CCM_1();
+ fn CCM_2();
+ fn EWM();
+ fn WDOG2();
+ fn SNVS_HP_WRAPPER();
+ fn SNVS_HP_WRAPPER_TZ();
+ fn SNVS_LP_WRAPPER();
+ fn CSU();
+ fn DCP();
+ fn DCP_VMI();
+ fn TRNG();
+ fn SAI1();
+ fn RTWDOG();
+ fn SAI3_RX();
+ fn SAI3_TX();
+ fn SPDIF();
+ fn PMU();
+ fn XBAR1_IRQ_0_1_2_3();
+ fn TEMP_LOW_HIGH();
+ fn TEMP_PANIC();
+ fn USB_PHY();
+ fn GPC();
+ fn ADC1();
+ fn FLEXIO1();
+ fn DCDC();
+ fn GPIO1_COMBINED_0_15();
+ fn GPIO1_COMBINED_16_31();
+ fn GPIO2_COMBINED_0_15();
+ fn GPIO5_COMBINED_0_15();
+ fn WDOG1();
+ fn ADC_ETC_IRQ0();
+ fn ADC_ETC_IRQ1();
+ fn ADC_ETC_IRQ2();
+ fn ADC_ETC_IRQ3();
+ fn ADC_ETC_ERROR_IRQ();
+ }
+ pub union Vector {
+ _handler: unsafe extern "C" fn(),
+ _reserved: u32,
+ }
+ #[cfg_attr(target_os = "none", unsafe(link_section = ".vector_table.interrupts"))]
+ #[unsafe(no_mangle)]
+ pub static __INTERRUPTS: [Vector; 80] = [
+ Vector { _handler: DMA0 },
+ Vector { _handler: DMA1 },
+ Vector { _handler: DMA2 },
+ Vector { _handler: DMA3 },
+ Vector { _handler: DMA4 },
+ Vector { _handler: DMA5 },
+ Vector { _handler: DMA6 },
+ Vector { _handler: DMA7 },
+ Vector { _handler: DMA8 },
+ Vector { _handler: DMA9 },
+ Vector { _handler: DMA10 },
+ Vector { _handler: DMA11 },
+ Vector { _handler: DMA12 },
+ Vector { _handler: DMA13 },
+ Vector { _handler: DMA14 },
+ Vector { _handler: DMA15 },
+ Vector {
+ _handler: DMA_ERROR,
+ },
+ Vector { _reserved: 0 },
+ Vector { _reserved: 0 },
+ Vector { _reserved: 0 },
+ Vector { _handler: LPUART1 },
+ Vector { _handler: LPUART2 },
+ Vector { _handler: LPUART3 },
+ Vector { _handler: LPUART4 },
+ Vector { _handler: PIT },
+ Vector { _handler: USB_OTG1 },
+ Vector { _handler: FLEXSPI },
+ Vector { _handler: FLEXRAM },
+ Vector { _handler: LPI2C1 },
+ Vector { _handler: LPI2C2 },
+ Vector { _handler: GPT1 },
+ Vector { _handler: GPT2 },
+ Vector { _handler: LPSPI1 },
+ Vector { _handler: LPSPI2 },
+ Vector { _handler: PWM1_0 },
+ Vector { _handler: PWM1_1 },
+ Vector { _handler: PWM1_2 },
+ Vector { _handler: PWM1_3 },
+ Vector {
+ _handler: PWM1_FAULT,
+ },
+ Vector { _handler: KPP },
+ Vector { _handler: SRC },
+ Vector { _handler: GPR_IRQ },
+ Vector { _handler: CCM_1 },
+ Vector { _handler: CCM_2 },
+ Vector { _handler: EWM },
+ Vector { _handler: WDOG2 },
+ Vector {
+ _handler: SNVS_HP_WRAPPER,
+ },
+ Vector {
+ _handler: SNVS_HP_WRAPPER_TZ,
+ },
+ Vector {
+ _handler: SNVS_LP_WRAPPER,
+ },
+ Vector { _handler: CSU },
+ Vector { _handler: DCP },
+ Vector { _handler: DCP_VMI },
+ Vector { _reserved: 0 },
+ Vector { _handler: TRNG },
+ Vector { _reserved: 0 },
+ Vector { _reserved: 0 },
+ Vector { _handler: SAI1 },
+ Vector { _handler: RTWDOG },
+ Vector { _handler: SAI3_RX },
+ Vector { _handler: SAI3_TX },
+ Vector { _handler: SPDIF },
+ Vector { _handler: PMU },
+ Vector {
+ _handler: XBAR1_IRQ_0_1_2_3,
+ },
+ Vector {
+ _handler: TEMP_LOW_HIGH,
+ },
+ Vector {
+ _handler: TEMP_PANIC,
+ },
+ Vector { _handler: USB_PHY },
+ Vector { _handler: GPC },
+ Vector { _handler: ADC1 },
+ Vector { _handler: FLEXIO1 },
+ Vector { _handler: DCDC },
+ Vector {
+ _handler: GPIO1_COMBINED_0_15,
+ },
+ Vector {
+ _handler: GPIO1_COMBINED_16_31,
+ },
+ Vector {
+ _handler: GPIO2_COMBINED_0_15,
+ },
+ Vector {
+ _handler: GPIO5_COMBINED_0_15,
+ },
+ Vector { _handler: WDOG1 },
+ Vector {
+ _handler: ADC_ETC_IRQ0,
+ },
+ Vector {
+ _handler: ADC_ETC_IRQ1,
+ },
+ Vector {
+ _handler: ADC_ETC_IRQ2,
+ },
+ Vector {
+ _handler: ADC_ETC_IRQ3,
+ },
+ Vector {
+ _handler: ADC_ETC_ERROR_IRQ,
+ },
+ ];
+}