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authorS.J.R. van Schaik <stephan@synkhronix.com>2021-05-31 04:51:32 -0400
committerGitHub <noreply@github.com>2021-05-31 08:51:32 +0000
commit08b1b955b1fba1f776ff233a23eb98526a8d0c39 (patch)
tree34510113a8c59794c1da21bf9ea5346d76cef436 /nmigen_boards/rz_easyfpga_a2_2.py
parente8611d433df8c2e4a0206c1d80faa2a831ca8da0 (diff)
[breaking-change] Factor out VGAResource.
Diffstat (limited to 'nmigen_boards/rz_easyfpga_a2_2.py')
-rw-r--r--nmigen_boards/rz_easyfpga_a2_2.py10
1 files changed, 3 insertions, 7 deletions
diff --git a/nmigen_boards/rz_easyfpga_a2_2.py b/nmigen_boards/rz_easyfpga_a2_2.py
index 3f6ee08..892b546 100644
--- a/nmigen_boards/rz_easyfpga_a2_2.py
+++ b/nmigen_boards/rz_easyfpga_a2_2.py
@@ -41,13 +41,9 @@ class RZEasyFPGAA2_2Platform(IntelPlatform):
dqm="42 55", attrs=Attrs(io_standard="3.3-V LVCMOS")),
# VGA connector, located on the right of the board.
- Resource("vga", 0,
- Subsignal("r", Pins("106", dir="o")),
- Subsignal("g", Pins("105", dir="o")),
- Subsignal("b", Pins("104", dir="o")),
- Subsignal("hs", Pins("101", dir="o")),
- Subsignal("vs", Pins("103", dir="o")),
- ),
+ VGAResource(0,
+ r="106", g="105", b="104",
+ hs="101", vs="103"),
# 4 digit 7 segment display, located on top of the board.
Display7SegResource(0,