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authorIvan Grokhotkov <ivan@espressif.com>2020-06-08 23:19:24 +0200
committerwhitequark <whitequark@whitequark.org>2020-06-11 14:10:55 +0000
commitf3957586e210d6d7c7c40b8b4080107c28c1c744 (patch)
treeb08a2127f5edb8ef060b41200117b12d532b457e /setup.py
parent1acda441f977c61ab0a7e1edad563d8cefc52252 (diff)
[breaking-change] nexys4ddr: fix UART RTS/CTS pins.
According to the schematic, RTS is E5 and CTS is D3. Previously these were reversed to work around signal direction set in UARTResource. Un-reverse the signals, and set correct direction by passing role=dce. Ref. https://reference.digilentinc.com/_media/nexys4-ddr:nexys_4_ddr_sch.pdf
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