First commit

2 files changed, 214 insertions, 0 deletions

diff --git a/drivers/ccm-10xx/src/ral/ccm.rs b/drivers/ccm-10xx/src/ral/ccm.rs
new file mode 100644
index 0000000..e8033ac
--- /dev/null
+++ b/drivers/ccm-10xx/src/ral/ccm.rs
@@ -0,0 +1,85 @@
+use ral_registers::{Instance, register};
+
+#[repr(C)]
+#[allow(non_snake_case)]
+pub struct RegisterBlock {
+    pub CCR: u32,
+    _reserved0: [u8; 0x04],
+    pub CSR: u32,
+    pub CCSR: u32,
+    pub CACRR: u32,
+    pub CBCDR: u32,
+    pub CBCMR: u32,
+    pub CSCMR1: u32,
+    pub CSCMR2: u32,
+    pub CSCDR1: u32,
+    pub CS1CDR: u32,
+    pub CS2CDR: u32,
+    pub CDCDR: u32,
+    _reserved1: [u8; 0x04],
+    pub CSCDR2: u32,
+    pub CSCDR3: u32,
+    _reserved2: [u8; 0x08],
+    pub CDHIPR: u32,
+    _reserved3: [u8; 0x08],
+    pub CLPCR: u32,
+    pub CISR: u32,
+    pub CIMR: u32,
+    pub CCOSR: u32,
+    pub CGPR: u32,
+    pub CCGR: [u32; 8],
+    pub CMEOR: u32,
+}
+
+/// A CCM instance.
+pub type CCM = Instance<RegisterBlock>;
+
+register!(pub(crate) CACRR<u32> RW [
+    ARM_PODF        start(0) width(3) RW {}
+]);
+
+register!(pub(crate) CSCMR1<u32> RW [
+    FLEXSPI_CLK_SRC start(31) width(1) RW {}
+    FLEXSPI_CLK_SEL start(29) width(2) RW {}
+    FLEXSPI_PODF    start(23) width(3) RW {}
+    PERCLK_PODF     start(0) width(6) RW {}
+    PERCLK_CLK_SEL  start(6) width(1) RW {}
+]);
+
+register!(pub(crate) CBCDR<u32> RW [
+    PERIPH_CLK2_PODF start(27) width(3) RW {}
+    PERIPH_CLK_SEL  start(25) width(1) RW {}
+    AHB_PODF        start(10) width(3) RW {}
+    IPG_PODF        start(8) width(2) RW {}
+]);
+
+register!(pub(crate) CLPCR<u32> RW [
+    LPM             start(0) width(2) RW {
+        RUN = 0,
+        WAIT = 1,
+        STOP = 2,
+    }
+]);
+
+register!(pub(crate) CSCDR1<u32> RW [
+    UART_CLK_PODF   start(0) width(6) RW {}
+    /// Reduced to 1 bit, which is supported across
+    /// all chip variants.
+    UART_CLK_SEL    start(6) width(1) RW {}
+]);
+
+register!(pub(crate) CSCDR2<u32> RW [
+    LPI2C_CLK_PODF  start(19) width(6) RW {}
+    LPI2C_CLK_SEL   start(18) width(1) RW {}
+]);
+
+register!(pub(crate) CBCMR<u32> RW [
+    /// Four bits wide on the 1010.
+    LPSPI_PODF      start(26) width(3) RW {}
+    PRE_PERIPH_CLK_SEL start(18) width(2) RW {}
+    PERIPH_CLK2_SEL start(12) width(2) RW {}
+    LPSPI_CLK_SEL   start(4)  width(2) RW {}
+]);
+
+register!(pub(crate) CCGR<u32> RW []);
+register!(pub(crate) CDHIPR<u32> RO []);
diff --git a/drivers/ccm-10xx/src/ral/ccm_analog.rs b/drivers/ccm-10xx/src/ral/ccm_analog.rs
new file mode 100644
index 0000000..958c7c1
--- /dev/null
+++ b/drivers/ccm-10xx/src/ral/ccm_analog.rs
@@ -0,0 +1,129 @@
+use ral_registers::{Instance, register};
+
+#[repr(C)]
+#[allow(non_snake_case)]
+pub struct RegisterBlock {
+    pub PLL_ARM: u32,
+    pub PLL_ARM_SET: u32,
+    pub PLL_ARM_CLR: u32,
+    pub PLL_ARM_TOG: u32,
+    pub PLL_USB1: u32,
+    pub PLL_USB1_SET: u32,
+    pub PLL_USB1_CLR: u32,
+    pub PLL_USB1_TOG: u32,
+    pub PLL_USB2: u32,
+    pub PLL_USB2_SET: u32,
+    pub PLL_USB2_CLR: u32,
+    pub PLL_USB2_TOG: u32,
+    pub PLL_SYS: u32,
+    pub PLL_SYS_SET: u32,
+    pub PLL_SYS_CLR: u32,
+    pub PLL_SYS_TOG: u32,
+    pub PLL_SYS_SS: u32,
+    _reserved0: [u8; 12],
+    pub PLL_SYS_NUM: u32,
+    _reserved1: [u8; 12],
+    pub PLL_SYS_DENOM: u32,
+    _reserved2: [u8; 12],
+    pub PLL_AUDIO: u32,
+    pub PLL_AUDIO_SET: u32,
+    pub PLL_AUDIO_CLR: u32,
+    pub PLL_AUDIO_TOG: u32,
+    pub PLL_AUDIO_NUM: u32,
+    _reserved3: [u8; 12],
+    pub PLL_AUDIO_DENOM: u32,
+    _reserved4: [u8; 12],
+    pub PLL_VIDEO: u32,
+    pub PLL_VIDEO_SET: u32,
+    pub PLL_VIDEO_CLR: u32,
+    pub PLL_VIDEO_TOG: u32,
+    pub PLL_VIDEO_NUM: u32,
+    _reserved5: [u8; 12],
+    pub PLL_VIDEO_DENOM: u32,
+    _reserved6: [u8; 28],
+    pub PLL_ENET: u32,
+    pub PLL_ENET_SET: u32,
+    pub PLL_ENET_CLR: u32,
+    pub PLL_ENET_TOG: u32,
+    pub PFD_480: u32,
+    pub PFD_480_SET: u32,
+    pub PFD_480_CLR: u32,
+    pub PFD_480_TOG: u32,
+    pub PFD_528: u32,
+    pub PFD_528_SET: u32,
+    pub PFD_528_CLR: u32,
+    pub PFD_528_TOG: u32,
+    _reserved7: [u8; 64],
+    pub MISC0: u32,
+    pub MISC0_SET: u32,
+    pub MISC0_CLR: u32,
+    pub MISC0_TOG: u32,
+    pub MISC1: u32,
+    pub MISC1_SET: u32,
+    pub MISC1_CLR: u32,
+    pub MISC1_TOG: u32,
+    pub MISC2: u32,
+    pub MISC2_SET: u32,
+    pub MISC2_CLR: u32,
+    pub MISC2_TOG: u32,
+}
+
+/// A CCM\_ANALOG instance.
+#[allow(non_camel_case_types)]
+pub type CCM_ANALOG = Instance<RegisterBlock>;
+
+register!(pub PLL_USB1<u32> RW [
+    LOCK            start(31) width(1) RW {}
+    BYPASS          start(16) width(1) RW {}
+    ENABLE          start(13) width(1) RW {}
+    POWER           start(12) width(1) RW {}
+    EN_USB_CLKS     start(6) width(1) RW {}
+]);
+pub use PLL_USB1 as PLL_USB1_SET;
+pub use PLL_USB1 as PLL_USB1_CLR;
+
+pub use PLL_USB1 as PLL_USB2;
+pub use PLL_USB2 as PLL_USB2_SET;
+pub use PLL_USB2 as PLL_USB2_CLR;
+
+register!(pub PLL_ARM<u32> RW [
+    LOCK            start(31) width(1) RW {}
+    ENABLE          start(13) width(1) RW {}
+    POWERDOWN       start(12) width(1) RW {}
+    DIV_SELECT      start(0) width(7) RW {}
+]);
+pub use PLL_ARM as PLL_ARM_SET;
+
+register!(pub PLL_ENET<u32> RW [
+    LOCK                start(31) width(1) RW {}
+    ENET_500M_REF_EN    start(22) width(1) RW {}
+    POWERDOWN           start(12) width(1) RW {}
+    BYPASS              start(16) width(1) RW {}
+    BYPASS_CLK_SRC      start(14) width(2) RW {}
+    ENABLE              start(13) width(1) RW {}
+    DIV_SELECT          start(0)  width(2) RW {
+        DIV_25MHZ = 0,
+        DIV_50MHZ = 1,
+        DIV_100MHZ = 2,
+        DIV_125MHZ = 3,
+    }
+]);
+
+register!(pub PLL_SYS<u32> RW [
+    LOCK            start(31) width(1) RW {}
+    BYPASS          start(16) width(1) RW {}
+    ENABLE          start(13) width(1) RW {}
+    POWERDOWN       start(12) width(1) RW {}
+]);
+
+pub use PLL_SYS as PLL_SYS_SET;
+pub use PLL_SYS as PLL_SYS_CLR;
+
+register!(pub PFD_480<u32> RW [
+    PFD3_FRAC      start(24) width(6) RW {}
+    PFD2_FRAC      start(16) width(6) RW {}
+    PFD1_FRAC      start(8)  width(6) RW {}
+    PFD0_FRAC      start(0)  width(6) RW {}
+]);
+
+pub use PFD_480 as PFD_528;