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As can be seen in the schematics for the Nexys4DDR board, the switches
SW8 and SW9 are connected to the 1.8V rail, rather than 3.3V.
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inverters.
Note: this change does NOT affect pin functionality or naming, and
does not require modifying your design. It does however affect some
board files, where keywords corresponding to active low pins will have
to be adjusted:
SPIResource(0, cs="C1", ...) → SPIResource(0, cs_n="C1", ...)
The new naming scheme will make it easier to write and audit board
files by clearly marking inverted pins in resource factories, similarly to
how `PinsN` indicates the same in bare resources.
Fixes #129.
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The new names follow the OSHWA convention described at:
https://www.oshwa.org/a-resolution-to-redefine-spi-signal-names/
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According to the schematic, RTS is E5 and CTS is D3. Previously these
were reversed to work around signal direction set in UARTResource.
Un-reverse the signals, and set correct direction by passing role=dce.
Ref. https://reference.digilentinc.com/_media/nexys4-ddr:nexys_4_ddr_sch.pdf
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